INTEL
Silicon Collateral Release Manager
INTEL, San Jose, California, United States, 95199
Job DescriptionIn Q4 2023, Intel announced Altera will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel. This position is associated with that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.
A critical function to model all the silicon design details in the FPGA development software. It enables customers to design with FPGA products and create complex designs. The FPGA silicon design goes through various abstractions and is used in the design software to enable customer designs. We are looking for a Collateral Release Manager who will manage the silicon collateral that is delivered from the silicon development team to the software teams. This is a highly visible role reporting directly to the Vice President of Silicon Design Engineering.
In this role, the expectations include but are not limited to:
Plan the process for a release.
Manage risks towards a release.
Monitor compliance to the goals of the release.
Set a high bar on the quality of a release.
Communicate the issues and status to the silicon and software teams.
Project Management skills to monitor progress towards goals and risk mitigation strategies.
QualificationsMinimum education requirements and qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Education Requirements
Bachelor's with 9+ years of experience or
Master's with 6+ years of experience or
PhD with 4+ years of experience in Electrical Engineering/Computer Science or related field.
Minimum Qualifications
10+ years of experience in silicon modeling roles.
Management of complex cross-functional deliverables.
Experience in chip development in either design, DV, or physical design.
Experience with industry standard tools and methodologies on RTL development, design verification, timing, power, and integration.
Preferred Qualifications
Experience in a silicon or software release manager role for 3+ years.
Experience with FPGA silicon architectures and software modeling.
Experience in design automation.
Inside this Business GroupThe Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in the US: $162,041.00 - $259,425.00
Salary range dependent on a number of factors including location and experience.
Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances, the work model may change to accommodate business needs.
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A critical function to model all the silicon design details in the FPGA development software. It enables customers to design with FPGA products and create complex designs. The FPGA silicon design goes through various abstractions and is used in the design software to enable customer designs. We are looking for a Collateral Release Manager who will manage the silicon collateral that is delivered from the silicon development team to the software teams. This is a highly visible role reporting directly to the Vice President of Silicon Design Engineering.
In this role, the expectations include but are not limited to:
Plan the process for a release.
Manage risks towards a release.
Monitor compliance to the goals of the release.
Set a high bar on the quality of a release.
Communicate the issues and status to the silicon and software teams.
Project Management skills to monitor progress towards goals and risk mitigation strategies.
QualificationsMinimum education requirements and qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Education Requirements
Bachelor's with 9+ years of experience or
Master's with 6+ years of experience or
PhD with 4+ years of experience in Electrical Engineering/Computer Science or related field.
Minimum Qualifications
10+ years of experience in silicon modeling roles.
Management of complex cross-functional deliverables.
Experience in chip development in either design, DV, or physical design.
Experience with industry standard tools and methodologies on RTL development, design verification, timing, power, and integration.
Preferred Qualifications
Experience in a silicon or software release manager role for 3+ years.
Experience with FPGA silicon architectures and software modeling.
Experience in design automation.
Inside this Business GroupThe Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in the US: $162,041.00 - $259,425.00
Salary range dependent on a number of factors including location and experience.
Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances, the work model may change to accommodate business needs.
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