Davita Inc.
Physical Design Lead
Davita Inc., Mountain View, California, us, 94039
Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver - The World's Most Experienced Driver - to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states.Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms.In this hybrid role, you will be reporting to the Head of Compute.You will:
Structure and drive custom silicon partnershipsAudit and collaborate with partners to optimize their PD flows and methodologiesWork closely with internal, program management, and external teams to ensure PD implementation meets design performance and schedule goals, including adjacent areas such as DFT, power, and reliabilityReview all final PD, timing, electrical, etc. sign-off for tape-out approvalEscalate program risks or resource gapsManage a small internal team of PD expertsYou have:
Strong team management, leadership, and communication skills, with experience coordinating internal and external activities5+ years of experience leading physical design of high performance SoCs or ASICsExpert knowledge and hands-on experience of the entire backend and adjacent flows, including synthesis, P&R, clocking, timing closure, floor plan, power and IO planningExperience in designing digital logic and/or Design For Testability (DFT) structures in System Verilog or equivalentWe prefer:
Track record of successfully driving custom/semi-custom silicon engagements with external partnersExperience with automotive silicon quality, reliability, and safety requirements and processesMixed signal design and characterizationExperience drafting and negotiating technical portions of contracts and SoWsFamiliar with chiplet or multi-chip packagingThe expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process.Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.Salary Range
$272,000 — $346,000 USD
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Structure and drive custom silicon partnershipsAudit and collaborate with partners to optimize their PD flows and methodologiesWork closely with internal, program management, and external teams to ensure PD implementation meets design performance and schedule goals, including adjacent areas such as DFT, power, and reliabilityReview all final PD, timing, electrical, etc. sign-off for tape-out approvalEscalate program risks or resource gapsManage a small internal team of PD expertsYou have:
Strong team management, leadership, and communication skills, with experience coordinating internal and external activities5+ years of experience leading physical design of high performance SoCs or ASICsExpert knowledge and hands-on experience of the entire backend and adjacent flows, including synthesis, P&R, clocking, timing closure, floor plan, power and IO planningExperience in designing digital logic and/or Design For Testability (DFT) structures in System Verilog or equivalentWe prefer:
Track record of successfully driving custom/semi-custom silicon engagements with external partnersExperience with automotive silicon quality, reliability, and safety requirements and processesMixed signal design and characterizationExperience drafting and negotiating technical portions of contracts and SoWsFamiliar with chiplet or multi-chip packagingThe expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process.Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.Salary Range
$272,000 — $346,000 USD
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