Synopsys Inc
Machine Learning Engr, Sr I - 48039BR
Synopsys Inc, Mountain View, California, us, 94039
Synopsys is at the forefront of Smart Everything with the world's most advanced technologies for chip design, verification, IP integration, and software security and quality testing. Leveraging the power of AI/ML/GenAI, we're dedicated to accelerating the innovation and development cycle of next-gen processors, ASICs, and other hardware products.
We are looking for a highly skilled and motivated Senior Machine Learning Engineer to join our multidisciplinary team and work closely with core EDA tool developers.
As a Senior Machine Learning Engineer, you will collaborate closely with hardware engineers, data scientists, product managers, and notably, core developers of Electronic Design Automation (EDA) tools. The role is focused on developing, deploying, and maintaining machine learning models aimed at enhancing the efficiency, reliability, and speed of chip design and verification processes through seamless EDA tool integration.
Responsibilities
Develop Generative AI and Machine Learning systems for Solution Generation & Optimization in RTL Design, RTL and System Verification, and Power/Performance/Area Optimization.Develop Large Language Model fine-tuning flows, Prompt Engineering, and Prompt fine-tuning.Work in close collaboration with core EDA tool developers to understand domain-specific needs and tailor machine learning solutions for seamless integration.Preprocess and analyze large datasets of chip simulations, tests, and performance metrics.Implement machine learning pipelines for automated data collection, feature extraction, training, and inference in the EDA environment.Evaluate the performance of machine learning models, and optimize them for computational efficiency, scalability, and integration with EDA tools.Develop visualization tools to interpret the results of machine learning models.Maintain clear and detailed documentation of models, pipelines, and experiments.Keep abreast of emerging technologies in machine learning and chip design to ensure our solutions remain state-of-the-art.Qualifications
PhD or 5+ years of experience with Bachelors or Master degree in Computer Science, Electrical Engineering, Machine Learning, or a related field.2+ years of experience in machine learning with a focus on generative techniques and optimization problems.Proficiency in Python and machine learning frameworks like TensorFlow or PyTorch.Solid understanding of EDA tools for chip design and verification such as Cadence, Synopsys, or Mentor Graphics, and experience collaborating with their core developers.Experience with cloud computing services like AWS, GCP, or Azure.Strong understanding of algorithmic complexity, data structures, and software design.Excellent communication skills, both written and verbal.Nice To Have
Large Language Model fine tuning and application in Hardware Design.Publications in machine learning, optimization, or chip design.Experience with hardware description languages like Verilog or VHDL.Background in statistical methods for experiment design and evaluation.At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
“The base salary range across the U.S. for this role is between $117,000 - $204,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.”
#J-18808-Ljbffr
We are looking for a highly skilled and motivated Senior Machine Learning Engineer to join our multidisciplinary team and work closely with core EDA tool developers.
As a Senior Machine Learning Engineer, you will collaborate closely with hardware engineers, data scientists, product managers, and notably, core developers of Electronic Design Automation (EDA) tools. The role is focused on developing, deploying, and maintaining machine learning models aimed at enhancing the efficiency, reliability, and speed of chip design and verification processes through seamless EDA tool integration.
Responsibilities
Develop Generative AI and Machine Learning systems for Solution Generation & Optimization in RTL Design, RTL and System Verification, and Power/Performance/Area Optimization.Develop Large Language Model fine-tuning flows, Prompt Engineering, and Prompt fine-tuning.Work in close collaboration with core EDA tool developers to understand domain-specific needs and tailor machine learning solutions for seamless integration.Preprocess and analyze large datasets of chip simulations, tests, and performance metrics.Implement machine learning pipelines for automated data collection, feature extraction, training, and inference in the EDA environment.Evaluate the performance of machine learning models, and optimize them for computational efficiency, scalability, and integration with EDA tools.Develop visualization tools to interpret the results of machine learning models.Maintain clear and detailed documentation of models, pipelines, and experiments.Keep abreast of emerging technologies in machine learning and chip design to ensure our solutions remain state-of-the-art.Qualifications
PhD or 5+ years of experience with Bachelors or Master degree in Computer Science, Electrical Engineering, Machine Learning, or a related field.2+ years of experience in machine learning with a focus on generative techniques and optimization problems.Proficiency in Python and machine learning frameworks like TensorFlow or PyTorch.Solid understanding of EDA tools for chip design and verification such as Cadence, Synopsys, or Mentor Graphics, and experience collaborating with their core developers.Experience with cloud computing services like AWS, GCP, or Azure.Strong understanding of algorithmic complexity, data structures, and software design.Excellent communication skills, both written and verbal.Nice To Have
Large Language Model fine tuning and application in Hardware Design.Publications in machine learning, optimization, or chip design.Experience with hardware description languages like Verilog or VHDL.Background in statistical methods for experiment design and evaluation.At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
“The base salary range across the U.S. for this role is between $117,000 - $204,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.”
#J-18808-Ljbffr