Ipro Networks Pte. Ltd.
Memory Circuit Design Engineer
Ipro Networks Pte. Ltd., Fremont, California, us, 94537
Job Title:
Memory Circuit Design EngineerPosition Type:
Full-Time / On-siteLocation:
Fremont, CASalary Range / Rate:
$110,000 - $300,000Years of Experience:
More than 5 yearsResponsibilities:Design memory IC projects from initial concept to the tape-out phase, ensuring a smooth and successful development process.Define and implement memory architectures and circuits, with a focus on optimizing speed, power efficiency, and silicon area utilization.Create comprehensive test plans to thoroughly evaluate memory designs, leveraging simulation tools and methodologies to validate functionality and performance.Identify and troubleshoot design issues, utilizing simulation and analysis to isolate problems and develop effective solutions.Collaborate with cross-functional teams to analyze and enhance the performance of memory designs, addressing bottlenecks and ensuring optimal operation.Work closely with analog and digital engineering teams to ensure seamless integration of memory designs into the overall product development, maintaining compatibility and functionality.Investigate and resolve design-related issues as they arise, contributing to the silicon bring-up and validation activities for memory ICs.Stay current with industry advancements in memory design, exploring and implementing cutting-edge techniques and technologies.Implement rigorous testing and validation processes to ensure memory designs meet quality and reliability standards.Maintain detailed documentation of memory design processes, methodologies, and findings to support team collaboration and project continuity.Requirements:MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design.5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be considered as experience), successful tape-out experience with leading foundries.Experience in memory circuit design in one of: SRAM, DRAM, Flash or emerging NVM technologies.Strong understanding of layout design including layout dependent effects, pitch matching, and design for manufacturing.Familiar with common EDA environment tools, CAD tools and memory design methodology including design, simulation, layout, and verification tools (e.g. Synopsys, Cadence, Mentor Graphics, etc.).Ability to create innovative architecture and circuit solutions to customer requirements.Ability to work in a startup environment and work both independently and as a team player.Experience in one or more of the following areas considered a strong plus:Hands-on production experience with key memory blocks such as sense amplifier, charge pump, read/write assist circuit, PVT tracker, power gating, etc.Familiar with memory controller or memory interface.Experience with emerging non-volatile memory.
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Memory Circuit Design EngineerPosition Type:
Full-Time / On-siteLocation:
Fremont, CASalary Range / Rate:
$110,000 - $300,000Years of Experience:
More than 5 yearsResponsibilities:Design memory IC projects from initial concept to the tape-out phase, ensuring a smooth and successful development process.Define and implement memory architectures and circuits, with a focus on optimizing speed, power efficiency, and silicon area utilization.Create comprehensive test plans to thoroughly evaluate memory designs, leveraging simulation tools and methodologies to validate functionality and performance.Identify and troubleshoot design issues, utilizing simulation and analysis to isolate problems and develop effective solutions.Collaborate with cross-functional teams to analyze and enhance the performance of memory designs, addressing bottlenecks and ensuring optimal operation.Work closely with analog and digital engineering teams to ensure seamless integration of memory designs into the overall product development, maintaining compatibility and functionality.Investigate and resolve design-related issues as they arise, contributing to the silicon bring-up and validation activities for memory ICs.Stay current with industry advancements in memory design, exploring and implementing cutting-edge techniques and technologies.Implement rigorous testing and validation processes to ensure memory designs meet quality and reliability standards.Maintain detailed documentation of memory design processes, methodologies, and findings to support team collaboration and project continuity.Requirements:MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design.5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be considered as experience), successful tape-out experience with leading foundries.Experience in memory circuit design in one of: SRAM, DRAM, Flash or emerging NVM technologies.Strong understanding of layout design including layout dependent effects, pitch matching, and design for manufacturing.Familiar with common EDA environment tools, CAD tools and memory design methodology including design, simulation, layout, and verification tools (e.g. Synopsys, Cadence, Mentor Graphics, etc.).Ability to create innovative architecture and circuit solutions to customer requirements.Ability to work in a startup environment and work both independently and as a team player.Experience in one or more of the following areas considered a strong plus:Hands-on production experience with key memory blocks such as sense amplifier, charge pump, read/write assist circuit, PVT tracker, power gating, etc.Familiar with memory controller or memory interface.Experience with emerging non-volatile memory.
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