Efficient
Senior Digital Design Engineer
Efficient, Phila, Pennsylvania, United States,
Efficient is seeking a Senior Digital Design Engineer to join our growing team. The Senior Digital Design Engineer will contribute to the design, implementation, and verification of the world’s most energy-efficient, general-purpose processor. This position is a unique opportunity to realize our product, work as a digital hardware designer with a highly interdisciplinary team, and help shape the future of Efficient’s technology.Key Responsibilities
Design, implement, and verify features from specification through synthesisImplement product features at the RTL-level targeting silicon implementationImplement product features at the RTL-level targeting FPGA emulation for verificationBuild unit testbench infrastructure to verify implemented featuresDesign of memory systems and digital integration of memory macros, including SRAM, MRAM, and othersInterface design components with external/vendor-provided IPUse industrial-strength digital design tools from RTL simulation through synthesis, which may include Cadence, Synopsys, Mentor/Siemens EDA, and ANSYS as necessaryProvide comprehensive feature and integration documentationInteract with physical design and digital verification team for pre-silicon verificationWork with physical design team to resolve RTL-level issues leading to DRC violationsWork with compiler and embedded software teams to develop, document, and implement features that span across the software-hardware boundary, including Efficient’s dataflow ISARequired qualifications & experience
7+ years of digital design experience with substantial experience designing for tape-outExperience running a digital design flow using industry-strength digital design and EDA toolsExperience with designing and implementing features in RTLExperience integrating digital IP with RTL-level implementationsExperience with pre-silicon verificationExperience with continuous integration and testing of digital designsExperience with version control and scripting languages (Python preferred)Experience with memory compiler toolchainsStrong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skillsDesired qualifications & experience
Knowledge of computer architectureKnowledge of physical design and ASIC implementationExperience with power and energy modeling (using tools like PowerArtist, Joules, etc.)Bachelor’s degree in related field required. Master’s or PhD. preferred.Efficient offers a
competitive
compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, flexibility, and more! We are committed to personal and professional development and strive to grow together as people and as a company.Ready to apply?
Ready to apply?
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Design, implement, and verify features from specification through synthesisImplement product features at the RTL-level targeting silicon implementationImplement product features at the RTL-level targeting FPGA emulation for verificationBuild unit testbench infrastructure to verify implemented featuresDesign of memory systems and digital integration of memory macros, including SRAM, MRAM, and othersInterface design components with external/vendor-provided IPUse industrial-strength digital design tools from RTL simulation through synthesis, which may include Cadence, Synopsys, Mentor/Siemens EDA, and ANSYS as necessaryProvide comprehensive feature and integration documentationInteract with physical design and digital verification team for pre-silicon verificationWork with physical design team to resolve RTL-level issues leading to DRC violationsWork with compiler and embedded software teams to develop, document, and implement features that span across the software-hardware boundary, including Efficient’s dataflow ISARequired qualifications & experience
7+ years of digital design experience with substantial experience designing for tape-outExperience running a digital design flow using industry-strength digital design and EDA toolsExperience with designing and implementing features in RTLExperience integrating digital IP with RTL-level implementationsExperience with pre-silicon verificationExperience with continuous integration and testing of digital designsExperience with version control and scripting languages (Python preferred)Experience with memory compiler toolchainsStrong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skillsDesired qualifications & experience
Knowledge of computer architectureKnowledge of physical design and ASIC implementationExperience with power and energy modeling (using tools like PowerArtist, Joules, etc.)Bachelor’s degree in related field required. Master’s or PhD. preferred.Efficient offers a
competitive
compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, flexibility, and more! We are committed to personal and professional development and strive to grow together as people and as a company.Ready to apply?
Ready to apply?
NameEmailNoteUpload FileUpload FileMax file size 10MB.Uploading...fileuploaded.jpgUpload failed. Max size for files is 10 MB.SubmitThank you! Your submission has been received!Oops! Something went wrong while submitting the form.
#J-18808-Ljbffr