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Micron

Senior OR Principal Layout Designer - TPG

Micron, Boise, Idaho, United States, 83708


Our vision is to transform how the world uses information to enrich life for

all

.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Layout Designer at Micron Technology, you will play a crucial role in the design and development of layout for critical custom, memory, analog, or standard cell circuits. You'll contribute on a dynamic team that crafts the physical layout of transistors, resistors, and capacitors used in the development of innovative memory products. Your attention to detail and expertise in layout verification will chip in to the success of our projects.

Layout Responsibilities:

Design and Development:

Responsible for creating layout designs for critical circuits, ensuring they meet process rules and match the schematic. You will work closely with Design, Process, and CAD engineers to create layout solutions.

Layout Verification:

Perform layout verification tasks such as LVS (Layout vs. Schematic), ORC (Design Rule Check), and quality checks. Continuously improve verification tools and methodologies to create high quality layout.

On-Time Delivery:

Deliver block-level layouts within specified timelines while maintaining acceptable quality standards.

Project Management:

Contribute to effective project management by collaborating with multi-functional global teams.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

To learn more about Micron, please visit

micron.com/careers

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