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Semiconductor Engineering

Associate Applications Engineer- Tessent (Design for Test) Siemens Digital Indus

Semiconductor Engineering, Wilsonville, Oregon, United States, 97070


Discover your career with us at Siemens Digital Industries Software!

We are a leading global software company dedicated to the world of computer aided design, 3D modeling and simulation— helping innovative global manufacturers design better products, faster! With the resources of a large company, and the energy of a software start-up, we have fun together while creating a world class software portfolio. Our culture encourages creativity, welcomes fresh thinking, and focuses on growth, so our people, our business, and our customers can achieve their full potential.

As an Associate Rotation Engineer, you will be involved in a structured Associate Rotation Engineer Training Program. This is a fast-track paid training program that challenges you to develop the expertise needed to tackle difficult technical problems.

Associate Rotation Engineers are members of a team of highly motivated individuals working with customers crafting the most sophisticated hardware and software systems in the world. This training program will give you outstanding insight into our technical marketing, product support, and sales organizations. Upon successful completion of this 12-month training program, you will be eligible to advance into one of these organizations. Post program opportunities include Field Application Engineer, Corporate Applications Engineer, and Technical Marketing Engineer positions.

This position will start in June 2025.

Requirements:

Excellent interpersonal and written communication skills

Self-motivated and results-oriented with strong problem-solving skills

Some travel may be required

Applicants must be willing and able to relocate anywhere within the USA upon completion of training

Salary:The salary range for this position is $111,000 to $131,000 and this role is eligible to earn another 3% in variable pay. Siemens offers a variety of health and wellness benefits to employees. In addition, this position is eligible for time off in accordance with Company policies, including paid sick leave, paid parental leave, PTO (for non-exempt employees) or non-accrued flexible vacation (for exempt employees).

Qualifications:

Must have a Bachelor or master’s degree in Electrical or Computer Engineering. Course work and project experience with VLSI design, HDL Synthesis, VLSI testing and design for testability. Experience with design, simulation, verification of ASIC/VLSI circuits and systems, design verification and product test generation preferred.

Have a good understanding of Design for Test (DFT) structures, including scan-based testing, Memory BIST, Logic BIST, and Boundary Scan (1149.1).

Have a desired knowledge of scan data compression methodologies.

Must have some experience in these specific areas:

Operating Systems: UNIX, Linux, Sun Solaris

Languages: Verilog (Behavioral, RTL, gate level), VHDL (Behavioral, RTL, gate level), TCL, Perl, C/C++

CAD Tools: Synthesis, Simulation, ATPG, Memory BIST, Logic BIST, Boundary Scan. Familiarity with Tessent DFT Software (TestKompress, FastScan, MemoryBIST, Diagnosis) a plus.

At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse individuals to develop tomorrow’s reality.

We are Siemens, a collection of over 377,000 minds building the future, one day at a time in over 200 countries. We’re dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!

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