L3Harris Technologies
Specialist, Microelectronics Advanced Packaging Designer
L3Harris Technologies, Palm Bay, Florida, United States, 32905
Job Title: Specialist, Microelectronics Advanced Packaging Designer - Tapeout
Job Code: 16329
Job Location: Palm Bay, FL
Job Schedule: 9/80 (Every other Friday off!)
Relocation: Relocation assistance is available to qualified applicants!
Job Description:
The L3Harris Space and Airborne Systems Microelectronics organization is expanding our in-house advanced packaging research and development efforts and capabilities. As a member of our dynamic and collaborative environment, you will be responsible for working with EDA tools to solve challenging layout problems at the silicon level.
Essential Functions:
Write and modify DRC and LVS rule deck in PVS or Calibre for silicon tapeout.Write Cadence SKILL routines for Virtuoso, APD, and general programming.Develop custom checks as needed for verification and robustness.Work with GDS and OAS file formats and translators.Work closely with advanced packaging design team to improve design tools and submit bug findings and improvement recommendations.Adapt to an evolving process and work closely with teammates providing up-to-date changes.Qualifications:
Bachelor's Degree in Electrical Engineering and a minimum of 4 years of prior related experience. Graduate Degree or equivalent with 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experienceExperience with hierarchical design editing in EDA tools including Virtuoso, K-Layout, and/or L-EditProfessional knowledge of coding in Python and/or MATLABExperience with foundry design rules encompassing minimum line widths, spaces, angles, and degassingProfessional experience with 3D layoutsPreferred Additional Skills:
Existing TS/SCI Clearance or ability to obtain one
Job Code: 16329
Job Location: Palm Bay, FL
Job Schedule: 9/80 (Every other Friday off!)
Relocation: Relocation assistance is available to qualified applicants!
Job Description:
The L3Harris Space and Airborne Systems Microelectronics organization is expanding our in-house advanced packaging research and development efforts and capabilities. As a member of our dynamic and collaborative environment, you will be responsible for working with EDA tools to solve challenging layout problems at the silicon level.
Essential Functions:
Write and modify DRC and LVS rule deck in PVS or Calibre for silicon tapeout.Write Cadence SKILL routines for Virtuoso, APD, and general programming.Develop custom checks as needed for verification and robustness.Work with GDS and OAS file formats and translators.Work closely with advanced packaging design team to improve design tools and submit bug findings and improvement recommendations.Adapt to an evolving process and work closely with teammates providing up-to-date changes.Qualifications:
Bachelor's Degree in Electrical Engineering and a minimum of 4 years of prior related experience. Graduate Degree or equivalent with 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experienceExperience with hierarchical design editing in EDA tools including Virtuoso, K-Layout, and/or L-EditProfessional knowledge of coding in Python and/or MATLABExperience with foundry design rules encompassing minimum line widths, spaces, angles, and degassingProfessional experience with 3D layoutsPreferred Additional Skills:
Existing TS/SCI Clearance or ability to obtain one