Radiance Technologies, Inc.
FPGA Digital Design Engineer
Radiance Technologies, Inc., Huntsville, Alabama, United States, 35824
FPGA Digital Design EngineerRadiance Technologies, a rapidly growing employee-owned company, is searching for talented, innovative scientists and engineers with interest in microelectronics security to join our Microelectronics Technology Operation. Modern embedded systems face security threats across the entire system lifecycle. Addressing these challenges requires individuals with out-of-the-box thinking, innovation, and the ability to work across multiple disciplines.
Candidates will design, simulate, synthesize, and test FPGA designs with Verilog and VHDL. Must be proficient in Verilog/VHDL design and have notable experience implementing complex designs on SoC FPGAs. Candidates will be required to apply out-of-the-box thinking to develop novel, non-traditional designs typically not implemented on FPGAs. Must work well in a small, fast-paced, and mission-driven environment. Will require innovation, quick learning, excellent communication skills, and adaptive thinking. There may be some travel associated with this position.
Desired Qualifications:
MS Degree in Computer Engineering, Electrical Engineering, or relevant field
Experience with digital ASIC and FPGA design flows involving timing closure using scripting languages and design automation.
Experience developing firmware for custom CPUs
Experience working with Xilinx FPGAs
Experience developing and testing firmware on FPGA prototype environments
Experience with Hardware Security, Cryptography, and/or Digital Rights Management
Desired Tool Experience: MATLAB, Python, Xilinx Vivado/ISE
Familiar with Linux and device drivers and Petalinux
Bare metal programming with no operating system using SOC, FPGA hardware
Required Experience:
BS in Computer Engineering, Electrical Engineering, or relevant field
Seven (7) years of digital design experience
Experience implementing complex designs in Verilog/VHDL for FPGA platforms
Hands-on experience with JTAG debuggers, logic analyzers, and protocol analyzers
Knowledge of Linux and Petalinux.
Required Tool Experience:
Xilinx Vivado/ISE
ModelSim
MS Visio
Microsoft Excel
Microsoft Word
Microsoft PowerPoint
Microsoft Project
Security Clearance:
Applicants will be required to obtain and maintain a Top Secret security clearance. Applicants will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
EOE/Minorities/Females/Vet/Disabled
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Candidates will design, simulate, synthesize, and test FPGA designs with Verilog and VHDL. Must be proficient in Verilog/VHDL design and have notable experience implementing complex designs on SoC FPGAs. Candidates will be required to apply out-of-the-box thinking to develop novel, non-traditional designs typically not implemented on FPGAs. Must work well in a small, fast-paced, and mission-driven environment. Will require innovation, quick learning, excellent communication skills, and adaptive thinking. There may be some travel associated with this position.
Desired Qualifications:
MS Degree in Computer Engineering, Electrical Engineering, or relevant field
Experience with digital ASIC and FPGA design flows involving timing closure using scripting languages and design automation.
Experience developing firmware for custom CPUs
Experience working with Xilinx FPGAs
Experience developing and testing firmware on FPGA prototype environments
Experience with Hardware Security, Cryptography, and/or Digital Rights Management
Desired Tool Experience: MATLAB, Python, Xilinx Vivado/ISE
Familiar with Linux and device drivers and Petalinux
Bare metal programming with no operating system using SOC, FPGA hardware
Required Experience:
BS in Computer Engineering, Electrical Engineering, or relevant field
Seven (7) years of digital design experience
Experience implementing complex designs in Verilog/VHDL for FPGA platforms
Hands-on experience with JTAG debuggers, logic analyzers, and protocol analyzers
Knowledge of Linux and Petalinux.
Required Tool Experience:
Xilinx Vivado/ISE
ModelSim
MS Visio
Microsoft Excel
Microsoft Word
Microsoft PowerPoint
Microsoft Project
Security Clearance:
Applicants will be required to obtain and maintain a Top Secret security clearance. Applicants will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
EOE/Minorities/Females/Vet/Disabled
#J-18808-Ljbffr