Tbwa Chiat/Day Inc
SoC DV Lead Santa Clara, CA
Tbwa Chiat/Day Inc, Santa Clara, California, us, 95053
As the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the ‘Memory Wall’ problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low tens of nanoseconds of latency and extremely low power. The Photonic Fabric based Compute Fabric enables Terabyte class bandwidth between compute nodes at low latency and power. Photonic Fabric delivers a transformative leap in AI system performance, ten years more advanced than existing technologies.About the RoleAs a growing startup, we’re scaling rapidly, and we’re looking for a
SoC Design Verification Lead
to drive our SoC verification efforts from pre-silicon simulation all the way through to SoC production.In this role, you will be responsible for leading verification strategy and execution for a complex SoC. You will work alongside a talented team in a collaborative culture that’s already established. As we expand, you’ll play a key role in scaling our methodologies, processes, and infrastructure to support more projects.Key ResponsibilitiesLead the verification of a complex 5nm SoC with high-speed interfaces.Collaborate closely with architects, customers, and design engineers to ensure successful product releases.Define and review verification and validation test plans for block-level, IP, and SoC-level projects.Build, manage, and mentor a team of ASIC/SoC verification engineers, including external contractors.Manage critical milestones and deliverables with the ASIC/SoC design team.Shape SoC verification methodologies and processes in partnership with Architecture, Design, and Verification technical leads.Work closely with software and emulation teams to ensure first-pass tapeout success.QualificationsBachelor’s degree
in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).8+ years
of experience in design verification with strong SystemVerilog expertise.2+ years
of experience with Python for verification.Expertise in UVM library development.Proficiency with simulators like Xcelium, ModelSim, Questa, or VCS.Preferred QualificationsMaster’s degree
or higher in Electrical or Computer Engineering with
6+ years
of relevant experience.Experience in AMS verification.As an early startup experiencing explosive growth, we offer an extremely attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $185,000.00 - $220,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by the candidate in the interviews.We offer great benefits (health, vision, dental, and life insurance), a collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high-performance computing.Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.
#J-18808-Ljbffr
SoC Design Verification Lead
to drive our SoC verification efforts from pre-silicon simulation all the way through to SoC production.In this role, you will be responsible for leading verification strategy and execution for a complex SoC. You will work alongside a talented team in a collaborative culture that’s already established. As we expand, you’ll play a key role in scaling our methodologies, processes, and infrastructure to support more projects.Key ResponsibilitiesLead the verification of a complex 5nm SoC with high-speed interfaces.Collaborate closely with architects, customers, and design engineers to ensure successful product releases.Define and review verification and validation test plans for block-level, IP, and SoC-level projects.Build, manage, and mentor a team of ASIC/SoC verification engineers, including external contractors.Manage critical milestones and deliverables with the ASIC/SoC design team.Shape SoC verification methodologies and processes in partnership with Architecture, Design, and Verification technical leads.Work closely with software and emulation teams to ensure first-pass tapeout success.QualificationsBachelor’s degree
in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).8+ years
of experience in design verification with strong SystemVerilog expertise.2+ years
of experience with Python for verification.Expertise in UVM library development.Proficiency with simulators like Xcelium, ModelSim, Questa, or VCS.Preferred QualificationsMaster’s degree
or higher in Electrical or Computer Engineering with
6+ years
of relevant experience.Experience in AMS verification.As an early startup experiencing explosive growth, we offer an extremely attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $185,000.00 - $220,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by the candidate in the interviews.We offer great benefits (health, vision, dental, and life insurance), a collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high-performance computing.Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.
#J-18808-Ljbffr