Physical Design Engineer

Looking Physical Design with Primetime PX/PrimePower.

Work Location : Bay Area Or Austin Or Remote

Experience : 8 Years to 12 Years

RTL2GDSII design flow usage & development in advanced technology nodes (7nm and below)

Low power implementation and signoff, power gating, multiple voltage rails, UPF/CPF usage.

• Experience in power analysis and reduction using Primetime PX/PrimePower.
• Experience in timing analysis and convergence using synopsys primetime.
• Proficiency in scripting languages such as Python and/or Perl is required.
• Proficiency with TCL is required.
• Familiarity with low power implementation techniques, clock gating, power gating etc.
• Good written and verbal communication skills.
• Familiarity with memories (SRAM/DRAM/RF/Flop based fifos).

Preferred Qualifications

• Power and performance implications with latest technology nodes.
• Proficiency with version control systems.
• Experience with rtl power optimization using tools such as Power-Artist.
• Experience with FSDB analysis for design profiling.