Microsoft
Director Physical Design
Microsoft, Mountain View, California, us, 94039
Location:
United States, California, Mountain ViewOverview:
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting-edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a
Director of Physical Design
to join the SCIPS Semi-custom and Central IP Silicon team and lead a team of RTL to GDS, RTL to PD, and implementation engineers. This team delivers a variety of IP to Azure, Xbox, and Surface silicon products as well as test chips in cutting-edge technologies. The candidate should be a motivated self-starter with the ability to lead others who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees, we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.Responsibilities:
Principal Physical Design:
Responsible for providing technical direction and managing deliverables of a team of Physical Design (PD) and implementation engineers.Project Oversight:
Overseeing a diverse set of projects, including soft IP (intellectual property), test chips, and mixed-signal IP development.Soft IP Projects:
Ensure IPs meet timing, power, and area targets.Test Chips:
Manage all aspects of physical design, including:Floorplanning, bump, and Electrostatic Discharge (ESD) planning.Synthesis, place-and-route, clock tree synthesis (CTS).Signoff for timing, electromigration, voltage drop, and physical verification.Mixed-Signal IP:
Integrate complex analog IPs within a digital system, acting as a key interface between IP and System on Chip (SoC).Signoff Responsibility:
Review signoff quality metrics prior to IP shipment and SoC tapeout.Collaboration:
Work closely with packaging engineers on IP requirements for 2D, 2.5D, and 3D packaging options.Communication:
Strong skills needed to coordinate with Register Transfer Level (RTL), Design for Testability (DFT), Computer-Aided Design (CAD), and SoC teams.Leadership:
Provide technical direction to less-experienced physical design engineers. Work with limited direction and attention to detail. Provide clear status updates on progress, issues, and risks to management.
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United States, California, Mountain ViewOverview:
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting-edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a
Director of Physical Design
to join the SCIPS Semi-custom and Central IP Silicon team and lead a team of RTL to GDS, RTL to PD, and implementation engineers. This team delivers a variety of IP to Azure, Xbox, and Surface silicon products as well as test chips in cutting-edge technologies. The candidate should be a motivated self-starter with the ability to lead others who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees, we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.Responsibilities:
Principal Physical Design:
Responsible for providing technical direction and managing deliverables of a team of Physical Design (PD) and implementation engineers.Project Oversight:
Overseeing a diverse set of projects, including soft IP (intellectual property), test chips, and mixed-signal IP development.Soft IP Projects:
Ensure IPs meet timing, power, and area targets.Test Chips:
Manage all aspects of physical design, including:Floorplanning, bump, and Electrostatic Discharge (ESD) planning.Synthesis, place-and-route, clock tree synthesis (CTS).Signoff for timing, electromigration, voltage drop, and physical verification.Mixed-Signal IP:
Integrate complex analog IPs within a digital system, acting as a key interface between IP and System on Chip (SoC).Signoff Responsibility:
Review signoff quality metrics prior to IP shipment and SoC tapeout.Collaboration:
Work closely with packaging engineers on IP requirements for 2D, 2.5D, and 3D packaging options.Communication:
Strong skills needed to coordinate with Register Transfer Level (RTL), Design for Testability (DFT), Computer-Aided Design (CAD), and SoC teams.Leadership:
Provide technical direction to less-experienced physical design engineers. Work with limited direction and attention to detail. Provide clear status updates on progress, issues, and risks to management.
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