Advanced Micro Devices
Senior ASIC Design Engineer
Advanced Micro Devices, San Jose, California, United States, 95199
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
THE ROLE:
As a member of the AI Engine IP team, you will help bring to life cutting-edge AI designs. You will be a member of the front-end design group, working closely with the architecture, verification, physical design, and product engineers to achieve the first pass silicon success.
THE PERSON:
A successful candidate will work actively with silicon design engineers from different time zones, be a motivated and driven designer/micro-architect, highly accurate and detail-oriented, and possess strong communication and problem-solving skills. The candidate will have to deliver to the highest quality attainable within the current IP architecture while being able to find critical issues and ways to overcome them.
KEY RESPONSIBILITIES:
Close collaboration with architects, verification engineers, and physical designers
Digital micro-architecture and design
RTL coding in Verilog/SystemVerilog
Low power RTL design techniques, UPF methodology
Design flow quality checks - Lint, CDC, RDC and others
Timing closure - synthesis, logic-depth reduction, timing constraints
Design area optimization
Physical Design interfacing
Sub-system and IP Integration into SoC
Feature specification and implementation
Test case debug and test-plan reviews
PREFERRED EXPERIENCE:
6 years working experience in ASIC Implementation
Proficiency in digital design and Verilog/SystemVerilog RTL
Active knowledge of all aspects of ASIC and FPGA design flows
Low power analysis and design
Communication protocols, AXI or similar
Hands-on front-end design of multi-clock / multi-reset domain blocks
ECO implementation
Design tools including Spyglass, Questa CDC, Conformal, VCS, Verdi, DVE
Shell/Tcl/Perl/Python scripting skills
Version control systems such as Perforce, ICManage
Experience working in geographically-dispersed team environments
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in Computer Engineering/Electrical Engineering
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail
here .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
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We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
THE ROLE:
As a member of the AI Engine IP team, you will help bring to life cutting-edge AI designs. You will be a member of the front-end design group, working closely with the architecture, verification, physical design, and product engineers to achieve the first pass silicon success.
THE PERSON:
A successful candidate will work actively with silicon design engineers from different time zones, be a motivated and driven designer/micro-architect, highly accurate and detail-oriented, and possess strong communication and problem-solving skills. The candidate will have to deliver to the highest quality attainable within the current IP architecture while being able to find critical issues and ways to overcome them.
KEY RESPONSIBILITIES:
Close collaboration with architects, verification engineers, and physical designers
Digital micro-architecture and design
RTL coding in Verilog/SystemVerilog
Low power RTL design techniques, UPF methodology
Design flow quality checks - Lint, CDC, RDC and others
Timing closure - synthesis, logic-depth reduction, timing constraints
Design area optimization
Physical Design interfacing
Sub-system and IP Integration into SoC
Feature specification and implementation
Test case debug and test-plan reviews
PREFERRED EXPERIENCE:
6 years working experience in ASIC Implementation
Proficiency in digital design and Verilog/SystemVerilog RTL
Active knowledge of all aspects of ASIC and FPGA design flows
Low power analysis and design
Communication protocols, AXI or similar
Hands-on front-end design of multi-clock / multi-reset domain blocks
ECO implementation
Design tools including Spyglass, Questa CDC, Conformal, VCS, Verdi, DVE
Shell/Tcl/Perl/Python scripting skills
Version control systems such as Perforce, ICManage
Experience working in geographically-dispersed team environments
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in Computer Engineering/Electrical Engineering
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail
here .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
#J-18808-Ljbffr