Cadence Design Systems
STA/EMIR IC Principal Solutions Engineer
Cadence Design Systems, San Jose, California, United States, 95199
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We offer amazing opportunities to grow, no matter where you are in your career.The ideal candidate will be energetic, innovative and enthused with how to help customers solve their toughest Digital Implementation problems using Cadence technology. Will drive Pre-sales and Post–sales activities at advanced nodes for Cadence Digital IC products.The qualified candidate will have hands-on experience with Timing, Emir, Characterization & Simulation tools, and good circuit design knowledge to help enable Signoff solutions at customer site. Also, close interface with R&D to enable new and differentiating technologies.In this role, the Solutions Engineer (SE) is expected to work both independently and in collaboration with other team members to address customer issues and to identify new opportunities or risks that are linked to those activities.The SE will interact with Product Engineering/R&D Team as well as Key Technologists at customer site to develop and enable new differentiating technologies.The SE will be solving complex technical issues related to Timing/Noise/Variation characterization for myriad circuits including memory designs and mixed signal design.The SE will participate in technical benchmarks, methodology presentations and ensure clean regression cycle and close loops with stakeholders before the software is delivered.The SE will implement design and conduct performance experiments, automate analysis of performance/accuracy data and design/implement/facilitate optimizations as appropriate.Requirements:5+ years industry related experience in the following.Expertise in Timing Signoff/Extraction/EMIR for both block/full chip closure.Prefer experience with Timing & EMIR tools such as Primetime/Tempus/Voltus/Redhawk.Low Power Designs and Power Modeling/Voltus.Statistical Analysis Fundamentals.Strong inter-personal and communication skills.Prefer experience with characterization Tools such as Liberate/Silicon-Smart.Exposure to advanced technologies like 5nm/3nm and 3DIC.Location: San Jose, CABe proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.The annual salary range for California is $120,400 to $223,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies, and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.We’re doing work that matters. Help us solve what others can’t.#J-18808-Ljbffr
We offer amazing opportunities to grow, no matter where you are in your career.The ideal candidate will be energetic, innovative and enthused with how to help customers solve their toughest Digital Implementation problems using Cadence technology. Will drive Pre-sales and Post–sales activities at advanced nodes for Cadence Digital IC products.The qualified candidate will have hands-on experience with Timing, Emir, Characterization & Simulation tools, and good circuit design knowledge to help enable Signoff solutions at customer site. Also, close interface with R&D to enable new and differentiating technologies.In this role, the Solutions Engineer (SE) is expected to work both independently and in collaboration with other team members to address customer issues and to identify new opportunities or risks that are linked to those activities.The SE will interact with Product Engineering/R&D Team as well as Key Technologists at customer site to develop and enable new differentiating technologies.The SE will be solving complex technical issues related to Timing/Noise/Variation characterization for myriad circuits including memory designs and mixed signal design.The SE will participate in technical benchmarks, methodology presentations and ensure clean regression cycle and close loops with stakeholders before the software is delivered.The SE will implement design and conduct performance experiments, automate analysis of performance/accuracy data and design/implement/facilitate optimizations as appropriate.Requirements:5+ years industry related experience in the following.Expertise in Timing Signoff/Extraction/EMIR for both block/full chip closure.Prefer experience with Timing & EMIR tools such as Primetime/Tempus/Voltus/Redhawk.Low Power Designs and Power Modeling/Voltus.Statistical Analysis Fundamentals.Strong inter-personal and communication skills.Prefer experience with characterization Tools such as Liberate/Silicon-Smart.Exposure to advanced technologies like 5nm/3nm and 3DIC.Location: San Jose, CABe proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.The annual salary range for California is $120,400 to $223,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies, and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.We’re doing work that matters. Help us solve what others can’t.#J-18808-Ljbffr