Cadence Design Systems
Lead Systems Engineer -High Speed Interconnect IPs.
Cadence Design Systems, San Jose, California, United States, 95199
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP and subsystem products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance silicon subsystems integrating Controller and PHY IPs related to protocols such as PCIe/CXL, UCIe, Ethernet.You will be a key member of the technical staff in an organization responsible for IP activities including but not limited to developing subsystem prototypes in hardware and software, helping the Product Marketing team in subsystem solutions launch, and engaging in pre-sales technical discussions with potential customers. This candidate will be the primary interface between customers (internal and external) and the CDNS R&D/Silicon Systems validation team. Candidates should possess strong communication skills with the ability to manage multiple priorities on a day-to-day basis. Ownership of tasks, the ability to collaborate with remote teams located worldwide, and clear communication of status are must-have attributes in this role.Familiarity with the following items is a plus:Serial link design techniquesData converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniquesMATLAB or C to facilitate architecture developmentHardware description languages such as SystemVerilog or VerilogA for functional model developmentScripting languages such as Perl or Python for automationSilicon validation testing knowledge and experienceOther requirements:Excellent verbal and written communication skillsMid-senior level to senior levelMS/Ph.D. in Electrical Engineering with 3+ years of analog design industry experience in advanced process technologiesThe annual salary range for California is $131,600 to $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies, and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.We’re doing work that matters. Help us solve what others can’t.#J-18808-Ljbffr
Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP and subsystem products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance silicon subsystems integrating Controller and PHY IPs related to protocols such as PCIe/CXL, UCIe, Ethernet.You will be a key member of the technical staff in an organization responsible for IP activities including but not limited to developing subsystem prototypes in hardware and software, helping the Product Marketing team in subsystem solutions launch, and engaging in pre-sales technical discussions with potential customers. This candidate will be the primary interface between customers (internal and external) and the CDNS R&D/Silicon Systems validation team. Candidates should possess strong communication skills with the ability to manage multiple priorities on a day-to-day basis. Ownership of tasks, the ability to collaborate with remote teams located worldwide, and clear communication of status are must-have attributes in this role.Familiarity with the following items is a plus:Serial link design techniquesData converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniquesMATLAB or C to facilitate architecture developmentHardware description languages such as SystemVerilog or VerilogA for functional model developmentScripting languages such as Perl or Python for automationSilicon validation testing knowledge and experienceOther requirements:Excellent verbal and written communication skillsMid-senior level to senior levelMS/Ph.D. in Electrical Engineering with 3+ years of analog design industry experience in advanced process technologiesThe annual salary range for California is $131,600 to $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies, and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.We’re doing work that matters. Help us solve what others can’t.#J-18808-Ljbffr