CPU Design Timing Engineer

SummaryPosted: Role Number:200573606Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure.DescriptionAs the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include but are not limited to: • Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency. • Work extensively with CPU micro-architects and Implementation engineers to drive timing closure for the CPU.Minimum QualificationsMinimum BS and 10+ years of relevant experienceExperience with a static timing analysis tool such as PrimeTime or TempusExperience with timing analysis with multiple clock and power domainsExperience with noise analysis and fixing noise in designsExperience with variation modeling in static timing analysis toolsExperience with TCL and either Perl or PythonExperience with SDC command usage including clock definitions, timing exceptions, and IO constraintsMust possess data parsing, analysis and representation/plotting skillsPreferred QualificationsPrior experience performing timing analysis in high speed digital designs such as CPUs or other similar designsUnderstanding of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, logic equivalenceUnderstanding of deep sub-micron technologies and scaling trendsWorking knowledge of CPU microarchitecture including common fundamental timing pathsWorking knowledge of clock-domain crossing and reset-domain crossingExperience with RTL modeling and assertion based verification is a plusPay & BenefitsAt Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200, and your base pay will depend on your skills, qualifications, experience, and location.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.