Synopsys, Inc.
Analog & Mixed-Signal Layout Design Engineer
Synopsys, Inc., Sunnyvale, California, United States, 94087
Analog & Mixed-Signal Layout Design Engineer
In this role, you will collaborate in the development of advanced analog integrated circuit designs using the best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes.
As a member of our IP Design Group, you will be developing IP in various technology nodes and foundries for different customers in a fast-paced and exciting design environment.
You will also be working to explore new, ground-breaking technologies and play a part in the documentation and support of those technologies.
Requirements
Typically requires an MSEE or BSEE with 1 year of academic or professional work experience. Additional related job experience is a plus. Works cooperatively with the team to debug and resolve a wide range of issues in creative ways. Understands fabrication flows and layout design flows and techniques. Can contribute to moderately complex design tasks in collaboration with analog circuit design and ASIC digital design teams. Can help in the preparation and presentation of technical layout review design material for internal audiences. Team contributor for ongoing flow development and improvements. Strong communication and organizational skills. Self-motivated, enthusiastic team player who enjoys working with others. Experience with TCL, SKILL, PERL, Python, or other language scripting is a plus. Strong working knowledge of MS Office Suite of applications. Drive innovation into the future SerDes generation with a dynamic work environment. Preferred But Not Required
Knowledge and experience using layout tools such as Custom Compiler (or equivalent). Basic knowledge or experience with DRC and LVS processes. Experience with layout verification tools. Standard cell construction and analog layout techniques. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars, Artificial Intelligence, the cloud, 5G, and the Internet of Things are ushering in the Era of Smart Everything. We’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Stay Connected:
Join our Talent Community Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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Typically requires an MSEE or BSEE with 1 year of academic or professional work experience. Additional related job experience is a plus. Works cooperatively with the team to debug and resolve a wide range of issues in creative ways. Understands fabrication flows and layout design flows and techniques. Can contribute to moderately complex design tasks in collaboration with analog circuit design and ASIC digital design teams. Can help in the preparation and presentation of technical layout review design material for internal audiences. Team contributor for ongoing flow development and improvements. Strong communication and organizational skills. Self-motivated, enthusiastic team player who enjoys working with others. Experience with TCL, SKILL, PERL, Python, or other language scripting is a plus. Strong working knowledge of MS Office Suite of applications. Drive innovation into the future SerDes generation with a dynamic work environment. Preferred But Not Required
Knowledge and experience using layout tools such as Custom Compiler (or equivalent). Basic knowledge or experience with DRC and LVS processes. Experience with layout verification tools. Standard cell construction and analog layout techniques. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars, Artificial Intelligence, the cloud, 5G, and the Internet of Things are ushering in the Era of Smart Everything. We’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Stay Connected:
Join our Talent Community Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
#J-18808-Ljbffr