Xone Technology, Inc. is hiring: Entry-Level/Junior FPGA Design Engineer in Sant

Join a dynamic, motivated, and passionate engineering team at a Silicon Valley startup developing sophisticated communication products. XONE is looking for an entry- or junior-level engineer who will be responsible for implementing complex signal processing algorithms on state-of-the-art FPGA devices such as the XILINX Zynq SoC. Experience a unique professional growth opportunity working alongside company leadership, gaining exposure to building and growing a technology-focused company, and making a direct impact on the success of the company. XONE Technology is committed to crafting high-performance, elegant solutions. XONE offers a modern open collaborative work environment, flexible work schedules, and provides a generous benefits package. Stock equity is available to candidates with directly relevant experience and leadership qualities. Make an impact in a growing engineering technology company located in the heart of Silicon Valley.

Responsibilities

1. Logic design in VHDL for Zynq SoC and Kintex FPGA devices
2. FPGA modeling, simulation, detailed design, implementation, and verification using Xilinx Vivado/ISE, ModelSim, Chipscope
3. Employ FPGA design methodology to address timing closure, design constraints, clocking, I/O, low power consumption
4. Design within modern processing architectures employing AXI on-chip I/O, high-speed interconnect I/O, high-capacity/-speed DDR3 DRAM memory, peripherals (GPIO, I2C, SPI, UART)
5. Integration of Xilinx IP cores into design
6. Work with system design team in the definition of requirements and architecture, design constraints, I/O and clock planning, and generation of test vectors and verification plans
7. Collaborate with embedded software engineering team in design, implementation, and test of functional and performance capabilities of the overall products
8. Disciplined design process, documentation of designs, structured coding practices, analysis of test results, configuration management
9. Involvement in all phases of the engineering lifecycle: R&D, prototyping, design, implementation, integration and test, system delivery, and product support
10. Excellent written and verbal communications
11. Operate in a collaborative engineering environment

Key Qualifications

1. 0-5 years relevant industry experience
2. Minimum BSEE, MSEE desired in digital design
3. RTL logic design in VHDL
4. Experience with FPGA development tools: Xilinx Vivado/ISE, ModelSim, Chipscope
5. Prototyping and analysis in Matlab, Simulink desirable
6. Programming in high-level languages such as C/C++, and scripting languages such as Python a plus
7. Knowledge and experience in digital signal processing, digital communications, and wireless communications a plus
8. US citizenship and eligibility to obtain a security clearance required