Top Secret Clearance Jobs
FPGA Hardware Engineer Intern Job at Top Secret Clearance Jobs in San Diego
Top Secret Clearance Jobs, San Diego, CA, United States, 92199
About the job FPGA Hardware Engineer Intern
Top Secret Clearance Jobs is dedicated to helping those with the most exclusive security clearance find their next career opportunity and get interviews within 48 hours.
DescriptionThe Leidos Innovations Center at Leidos currently has an opening for a FPGA Hardware Engineer Internship to work in our San Diego, CA office with the Applied Science Division. The Applied Science Division operates at the leading edge of technology by designing, demonstrating, and deploying solutions to solve complex remote sensing problems for our Department of Defense customers. This is an exciting opportunity to contribute to system development and to gain experience for an individual with interest in maritime systems, system prototyping, algorithm and software development. This is an excellent opportunity for a student to gain hands-on experience and contribute to real-world projects.
Primary Responsibilities.In this role you will work with a mentor with daily supervision. You will work on developing for a heterogenous processor software using the Quartus development tool or similar. You will assist in measuring performance of the development board, assist in architecture development, and develop for the FPGA processing component. You participate in team meetings, document your efforts and your findings, share you work through a repository, and present the culmination of your work. The responsibilities may be modified to maximize value to the candidate and to the team.
Basic Qualifications.
While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.
Pay RangePay Range $44,850.00 - $81,075.00
The Leidos pay range for this job level is a general guideline onlyand not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.
Top Secret Clearance Jobs is dedicated to helping those with the most exclusive security clearance find their next career opportunity and get interviews within 48 hours.
DescriptionThe Leidos Innovations Center at Leidos currently has an opening for a FPGA Hardware Engineer Internship to work in our San Diego, CA office with the Applied Science Division. The Applied Science Division operates at the leading edge of technology by designing, demonstrating, and deploying solutions to solve complex remote sensing problems for our Department of Defense customers. This is an exciting opportunity to contribute to system development and to gain experience for an individual with interest in maritime systems, system prototyping, algorithm and software development. This is an excellent opportunity for a student to gain hands-on experience and contribute to real-world projects.
Primary Responsibilities.In this role you will work with a mentor with daily supervision. You will work on developing for a heterogenous processor software using the Quartus development tool or similar. You will assist in measuring performance of the development board, assist in architecture development, and develop for the FPGA processing component. You participate in team meetings, document your efforts and your findings, share you work through a repository, and present the culmination of your work. The responsibilities may be modified to maximize value to the candidate and to the team.
Basic Qualifications.
- Must be graduated by summer of 2025 with a BS in a hardware engineering disciple and pursuing a graduate degree.
- Have taken relevant coursework including Signals and Systems, Microprocessor and System Interfacing, and Programming or similar.
- Must be able to obtain and maintain a Top Secret Clearance.
- US citizenship required.
- Strong communication skills and ability to be organized in one's work and to document your efforts.
- Experience or education in FPGA design.
- Experience or education in software development in Verilog or HDL, C++, Python, and Matlab.
- Work or lab experience in acoustics, radar, communications, or other similar applications.
While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.
Pay RangePay Range $44,850.00 - $81,075.00
The Leidos pay range for this job level is a general guideline onlyand not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.