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Palo Alto Networks

ASIC Design Verification Engineer Hardware Job at Palo Alto Networks in Santa Cl

Palo Alto Networks, Santa Clara, CA, United States, 95053


Job Description

Your Career

As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test plans, specify coverage, write tests, and debug. You will work on diverse platforms including simulation, emulation, and silicon validation.

Your Impact

  • Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation and emulation.
  • Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies.
  • Develop flows, methodologies, and infrastructure for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers.
  • Define new tools and methodologies to continuously improve quality and velocity.

Qualifications:

Your Experience

  • BS in EE, CE, or CS required or equivalent military experience - MSEE preferred.
  • Minimum 5 years experience in ASIC design verification.
  • Demonstrated success in taking ASIC products to mass production.
  • Expertise in SystemVerilog and UVM.

Required strengths

  • Defining test plans, including comprehensive adversarial testing.
  • Developing rich functional coverage models.
  • Creating powerful and scalable test benches.
  • Implementing sophisticated self-checking infrastructure with reference models and scoreboards.
  • Developing reusable constrained-random tests.
  • Debugging failures.
  • Closing coverage.

Preferred experience

  • Networking and cybersecurity.
  • Silicon validation - bringup, test, debug, and regression.
  • Creating models in Python and C/C++.
  • Writing driver code in C.
  • Skilled in writing powerful, modular, and scalable programs in Python, Perl, and UNIX shell to automate verification tasks, especially regression testing.
  • Demonstrated ownership and independence in planning, debugging complex failures, closing metrics-driven tasks, driving vendors, and reporting status.
  • Strong leadership, collaboration, and communication skills.

The Team

We are the global cybersecurity leader, known for always challenging the security status quo. Our mission is to protect our way of life in the digital age by preventing successful cyberattacks. This has given us the privilege of safely enabling tens of thousands of organizations and their customers.

Compensation Disclosure

The compensation offered for this position will depend on qualifications, experience, and work location. The starting base salary is expected to be between $101,000 - $164,000/YR. The offered compensation may also include restricted stock units and a bonus.

Our Commitment

We’re problem solvers that take risks and challenge cybersecurity’s status quo. We are committed to providing reasonable accommodations for all qualified individuals with a disability. If you require assistance or accommodation due to a disability or special need, please contact us at accommodations@paloaltonetworks.com.

Palo Alto Networks is an equal opportunity employer. We celebrate diversity in our workplace, and all qualified applicants will receive consideration for employment without regard to legally protected characteristics.

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