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Intelliswift

Emulation Staff Engineer - Zebu

Intelliswift, Menlo Park, CA


Skills and Responsibilities: • ASIC/IP RTL to Emulation platforms (Preferred: Zebu, Palladium) • Build model from released RTL • Generate target platform loadable image(s) test and release the image to Firmware and DV teams. • Run sanity tests for qualifying release of the image(s) • Release the model to various team including Functional Validation team, Firmware, DV • Assist debug of failures providing instrumented model ( Waveform Dumps, in circuit debug) and interfacing with stakeholder. • Coordinate with Tools team to validate tool and Model release • FPGA and Emulator flows and methodologies • Experience with Daughtercards, Speedbridges, Virtual Prototyping • Hardware emulators, such as Zebu is a must have, Palladium is appreciated • Emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration • Strong knowledge of Complete Design Cycle to understand the Different IP designs to integrate In the build • Simulation acceleration knowledge (DPI and Transactors) • In depth understanding of RTL and Synthesis • Logic simulation: VCS/NCSIM • Programming/scripting skills (C, C++, Python) • Experience with CPU integration is a big plus, especially ARM/RISC-V CPU • Knowledge of CoreSight/UltraSoC debug infrastructure integration is a plus • Knowledge of OS kernel and experience in driver development • Experience with FPGA and/or Emulation platforms • Experience with lab system debug with logic analyzers, scopes, meters etc. Additional Skills • PROTOTYPE • SELF MOTIVATED • STRUCTURED SOFTWARE • PROTOTYPING • PYTHON • SCRIPTING • SOC • TCL • USB • ALGORITHM • ARCHITECTURE • DEBUG • FIELD PROGRAMMABLE GATE ARRAY • FIRMWARE • LOGIC ANALYZERS • PCI EXPRESS • PERFORMANCE MODELING Additional Job Details: 1 - Concept Prototyping (P3 - Advanced) | 2 - Firmware Engineering (P3 - Advanced) Primary Skill Python