Qualcomm
Staff CPU RTL Design Engineer
Qualcomm, Oregon, Illinois, United States, 61061
Company:
Qualcomm India Private Limited Job Area:
Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Skills & Experience 8+ Years of experience in micro-architecture development, RTL design, Design Integration, front-end flows Lint, CDC, low-power checks, etc. Knowledge of Synthesis/DFT/FV/STA is also good to have. Experience in using the tools in ASIC development such as Lint, CDC & LowPower. Good Working Knowledge of ARM-ISAs & Computer Architecture. Understanding of protocols like AHB/AXI/ACE/CHI-B/E is desirable. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills. Working knowledge of Active power management (DVFS), Idle power management, Limit management (TDP, Thermal and Over-current protection), Clock management, Debug and Trace architecture is good to have. Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools. Hands-on experience in Multi Clock designs, Asynchronous interfaces. Knowledge of logic design principles along with timing and power implications. Responsibilities Work with CPU and SOC architects to understand concept and high-level system requirements. Micro-architecture, RTL development of CPUSS and its validation for linting, clock-domain crossing, low power rules and DFT rules. Work with functional verification team on test-plan development and DV-debugs. UPF writing, power aware checks and low power checks. Provide support to SoC integration and chip level debug. Support post-silicon bring-up and debug while working with Validation & SW team. Evaluate complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Write detailed technical documentation for complex Hardware projects.
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Qualcomm India Private Limited Job Area:
Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Skills & Experience 8+ Years of experience in micro-architecture development, RTL design, Design Integration, front-end flows Lint, CDC, low-power checks, etc. Knowledge of Synthesis/DFT/FV/STA is also good to have. Experience in using the tools in ASIC development such as Lint, CDC & LowPower. Good Working Knowledge of ARM-ISAs & Computer Architecture. Understanding of protocols like AHB/AXI/ACE/CHI-B/E is desirable. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills. Working knowledge of Active power management (DVFS), Idle power management, Limit management (TDP, Thermal and Over-current protection), Clock management, Debug and Trace architecture is good to have. Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools. Hands-on experience in Multi Clock designs, Asynchronous interfaces. Knowledge of logic design principles along with timing and power implications. Responsibilities Work with CPU and SOC architects to understand concept and high-level system requirements. Micro-architecture, RTL development of CPUSS and its validation for linting, clock-domain crossing, low power rules and DFT rules. Work with functional verification team on test-plan development and DV-debugs. UPF writing, power aware checks and low power checks. Provide support to SoC integration and chip level debug. Support post-silicon bring-up and debug while working with Validation & SW team. Evaluate complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Write detailed technical documentation for complex Hardware projects.
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