Principal Physical Design Engineer

Principal Physical Design Engineer About the Opportunity: Acceler8 Talent is seeking an experienced Physical Design Engineer to join an innovative hardware startup developing state-of-the-art networking solutions for large scale AI compute systems, providing unprecedented efficiency and bandwidth, solving the biggest challenge in AI compute. As a Physical Design Engineer, you will play a critical role in translating architectural visions into silicon reality. You will drive the implementation, optimization, and verification of physical design flows to achieve the best performance, power, and area (PPA) metrics for complex hardware designs. This is a unique opportunity to shape groundbreaking hardware solutions in a dynamic and fast-paced environment. Key Responsibilities: Own and execute physical implementation tasks, including synthesis, floorplanning, placement, clock tree synthesis, routing, and signoff. Collaborate with RTL designers and architects to ensure seamless integration of design intent into physical layout. Perform static timing analysis (STA) and optimize designs to meet aggressive performance, power, and area targets. Identify and resolve issues related to congestion, DRC, LVS, and timing closure. Develop and enhance physical design automation scripts and methodologies to improve workflow efficiency. Contribute to power analysis, IR drop analysis, and thermal management optimization. Partner with fabrication teams to ensure successful tapeout and silicon validation. Qualifications: 8 years in physical design, implementation, and signoff for complex ASIC or SoC designs. Proficiency in industry-standard EDA tools for physical design (e.g., Synopsys ICC2, Cadence Innovus, Mentor Calibre). Familiarity with advanced process nodes (e.g., 5nm, 3nm) and their associated challenges. Strong knowledge of static timing analysis (STA) and tools like Synopsys PrimeTime. Experience in power, performance, and area (PPA) optimization techniques. Proficiency in scripting languages such as Python, Tcl, or Perl to automate workflows. Proven ability to debug and resolve physical design challenges. Strong communication skills and a team-oriented mindset to work effectively with cross-disciplinary teams. Preferred Qualifications: Experience with high-performance computing architectures or AI accelerators. Knowledge of clock domain crossing (CDC) analysis and multi-voltage design methodologies. Background in physical verification, including DRC and LVS signoff. Why Join Us? Be part of a cutting-edge team developing transformative hardware for machine learning and AI applications. Work in a collaborative, fast-paced startup environment with significant opportunities for impact. Competitive compensation package, including benefits and equity. Opportunity to work with advanced technologies and contribute to industry-leading innovations. How to Apply: If you’re passionate about physical design and excited about building groundbreaking hardware solutions, we’d love to hear from you. Please apply here or reach out to Luke at ltomaszkoacceler8talent.com to hear more.