Silicon Recruit
Experience & Qualifications:
Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
5+ years of experience in CPU/SoC power architecture, microarchitecture, or low-power design.
Deep understanding of CPU architectures, pipelines, and power management techniques.
Experience with power modeling tools, simulation frameworks, and power/performance trade-off analysis.
Proficiency in power optimization methodologies at different levels (architecture, RTL, circuit).
Strong knowledge of power reduction techniques such as clock gating, power gating, and dynamic voltage scaling.
Familiarity with industry-standard tools for power analysis (e.g., PrimeTime PX, PowerArtist, Joules).
Hands-on experience with scripting (Python, Perl, or TCL) and programming languages (C, C++).
Excellent problem-solving skills and ability to work in a fast-paced, collaborative environment.
Experience in AI/ML-driven power optimization.
Knowledge of emerging low-power design trends in mobile, server, or edge computing.
Experience with RTL design and verification methodologies.
Familiarity with firmware and operating system power management strategies.