Annapolis Micro Systems
Firmware Engineer Co-op
Annapolis Micro Systems, Annapolis, Maryland, United States, 21403
We are the leader in COTS FPGA-based high-performance computing. Our accelerator products employ the latest FPGA and SoC technology to provide computing capabilities far beyond what general purpose processors can provide.
Our firmware design team develops, maintains, and tests interfaces on high-performance FPGA computing systems. Members of the team regularly design both structural and behavioral HDL cores and models and simulate them with the latest simulation tools. Once hardware is available, the designer works to bring the design to life on the actual FPGA, ACAP, or MPSoC. As new boards are developed, design work is centered around interfaces between FPGAs and I/O devices. Of course, supporting data flow and algorithmic cores such as DSP cores are also a part of the design process.
These HDL efforts are then encapsulated and mapped into the CoreFire Next™ design space using Java. This Eclipse-based tool allows for a graphical approach to FPGA design, which empowers users to create powerful designs quickly and efficiently.
Unique to the Annapolis experience, all Firmware Engineering Co-ops who work two semester terms back-to-back are offered an opportunity to work one semester with the Firmware team and the other with the Software team.
Essential Duties and Responsibilities
Help design and simulate FPGA interfaces to external devices on new platforms including in lab testingCreate example applications showcasing features of our FPGA platformsLearn to develop for and utilize our CoreFire Next software toolCreate and maintain documentation for the interfaces and applications you developStrive to continuously improve the quality and reliability of our productsDesign for the latest and future Xilinx and Intel FPGAs and ACAPsLearn from, and work side-by-side with, the leading FPGA experts!
Our firmware design team develops, maintains, and tests interfaces on high-performance FPGA computing systems. Members of the team regularly design both structural and behavioral HDL cores and models and simulate them with the latest simulation tools. Once hardware is available, the designer works to bring the design to life on the actual FPGA, ACAP, or MPSoC. As new boards are developed, design work is centered around interfaces between FPGAs and I/O devices. Of course, supporting data flow and algorithmic cores such as DSP cores are also a part of the design process.
These HDL efforts are then encapsulated and mapped into the CoreFire Next™ design space using Java. This Eclipse-based tool allows for a graphical approach to FPGA design, which empowers users to create powerful designs quickly and efficiently.
Unique to the Annapolis experience, all Firmware Engineering Co-ops who work two semester terms back-to-back are offered an opportunity to work one semester with the Firmware team and the other with the Software team.
Essential Duties and Responsibilities
Help design and simulate FPGA interfaces to external devices on new platforms including in lab testingCreate example applications showcasing features of our FPGA platformsLearn to develop for and utilize our CoreFire Next software toolCreate and maintain documentation for the interfaces and applications you developStrive to continuously improve the quality and reliability of our productsDesign for the latest and future Xilinx and Intel FPGAs and ACAPsLearn from, and work side-by-side with, the leading FPGA experts!