Synopsys
Applications Engineering, Principal Engineer
Synopsys, Mountain View, California, us, 94039
Senior Applications Engineer (ASIC / PCIe IP Design)
49468BR
USA - California - Mountain View/Sunnyvale
Job Description and Requirements
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
PCIe Applications Engineer
This position requires a highly motivated and experienced person to work with Synopsys' customers on integrating leading edge Interface IP (IIP) into their ASIC SoC/systems for next generation products.
The position offers opportunities to work on Synopsys
PCIe (Peripheral Component Interconnect Express) IP
and the latest industry specifications/applications on various hot market segments. The position will provide PCIe IP integration guidance to customers throughout their SoC flow to resolve technical challenges, perform integration reviews at key milestones and support silicon/system bring-up. Some travels will be required.
Responsibilities IncludeUnderstand about IIP applications on customer specific SoC and systemsKeep abreast of the latest ASIC/SoC design flows and EDA toolsProvide professional advice and support to configure and resolve IIP integration challenges including simulation, synthesis, floorplan, STA, DFT, silicon bring-up, etc.Provide integration training to customers and conduct reviews on their major SoC milestonesPartner with R&D to produce application notes on advance topicsProvide pre-sales support on IIP integration and support conference demosProvide feedback to Synopsys R&D for continuous IIP product improvementsParticipate in R&D design reviews to align development with future customer needs
Key Qualifications
Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering Computer Science, or related fieldsTypically requires at least 8 years of design, verification, or applications experienceHands-on experience on ASIC Front-End or Back-End developmentAttention to detail and high degree of self-motivationProven methodical, reasoning, and problem-solving skillsProven verbal and written communication skills
Preferred Experience
Experience with advanced technology processes (10nm/7nm/5nm/3nm) mixed signal IP or circuit design, implementation or technical supportDomain knowledge in Die-to-Die and PCIe/CXL protocol are highly desirableSilicon and/or FPGA/hardware debug and troubleshooting skillsKnowledge of advanced EDA tool products and product knowledge in any of the areas of P&R, Physical Verification, Signal Integrity/Power Integrity* Salary will be commensurate with experience.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
The base salary range across the U.S. for this role is between $173,000-$259,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Job Category
Engineering
Country
United States
Job Subcategory
Applications Engineering
Hire Type
Employee
Base Salary Range
$173,000-$259,000
#J-18808-Ljbffr
49468BR
USA - California - Mountain View/Sunnyvale
Job Description and Requirements
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
PCIe Applications Engineer
This position requires a highly motivated and experienced person to work with Synopsys' customers on integrating leading edge Interface IP (IIP) into their ASIC SoC/systems for next generation products.
The position offers opportunities to work on Synopsys
PCIe (Peripheral Component Interconnect Express) IP
and the latest industry specifications/applications on various hot market segments. The position will provide PCIe IP integration guidance to customers throughout their SoC flow to resolve technical challenges, perform integration reviews at key milestones and support silicon/system bring-up. Some travels will be required.
Responsibilities IncludeUnderstand about IIP applications on customer specific SoC and systemsKeep abreast of the latest ASIC/SoC design flows and EDA toolsProvide professional advice and support to configure and resolve IIP integration challenges including simulation, synthesis, floorplan, STA, DFT, silicon bring-up, etc.Provide integration training to customers and conduct reviews on their major SoC milestonesPartner with R&D to produce application notes on advance topicsProvide pre-sales support on IIP integration and support conference demosProvide feedback to Synopsys R&D for continuous IIP product improvementsParticipate in R&D design reviews to align development with future customer needs
Key Qualifications
Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering Computer Science, or related fieldsTypically requires at least 8 years of design, verification, or applications experienceHands-on experience on ASIC Front-End or Back-End developmentAttention to detail and high degree of self-motivationProven methodical, reasoning, and problem-solving skillsProven verbal and written communication skills
Preferred Experience
Experience with advanced technology processes (10nm/7nm/5nm/3nm) mixed signal IP or circuit design, implementation or technical supportDomain knowledge in Die-to-Die and PCIe/CXL protocol are highly desirableSilicon and/or FPGA/hardware debug and troubleshooting skillsKnowledge of advanced EDA tool products and product knowledge in any of the areas of P&R, Physical Verification, Signal Integrity/Power Integrity* Salary will be commensurate with experience.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
The base salary range across the U.S. for this role is between $173,000-$259,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Job Category
Engineering
Country
United States
Job Subcategory
Applications Engineering
Hire Type
Employee
Base Salary Range
$173,000-$259,000
#J-18808-Ljbffr