Apple, Inc.
Senior RFIC Design Engineer
Apple, Inc., Sunnyvale, California, United States, 94087
Summary
Posted: Jun 13, 2024
Role Number:
200513232
Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As Sr. RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products.
Description
As a Senior RFIC Design lead, you are going to be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products. Responsibilities include:Lead design of radio transceiver chains including TX, RX, and PLL-LOGen for wireless connectivity products.Drive radio KPI (power, area, performance) to meet product requirements.Work with cross-functional teams including platform architecture, wireless design, RF HW and SW to define radio features enabling wireless innovation.Work closely with RF Systems in block level and high level specifications of the TX and RX line ups and PLL-LOGen, and proper distribution of spec margins in the chain.Hands-on design contributions starting from concept, architecture, and topology to transistor-level feasibility studies and KPI trade-off analysis to actual design, simulations, and extractions.Design of RF and Analog loopbacks for calibration and compensation.Work through Co-Existence scenarios and design to meet the CoEx requirements.Oversee the floorplan layout and verification of the design to ensure a successful tape-out.Close collaboration with RFIC test engineers in the bring up, debug and optimization of the wireless connectivity chip through the productization.Provide design versus silicon measurements correlation, and compliance with specification for a volume production.Work with the foundry team to understand the capabilities and limitations of the new technology nodes to achieve the optimum radio performance.Provide guidance on analog and RF issues across Apple.
Key Qualifications
Typically requires 10+ years of RF/analog and mixed-signal design experience in cutting-edge RF CMOS design.Direct experience in designing and bringing into mass production of wireless transceivers in deep sub-micron RFCMOS technology.Deep understanding of analog, mixed-signal and RF circuit design including design of LNAs and PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters and amplifiers, data converters and calibration methods.Deep understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, and other analog impairments.Familiarity with various RF transceiver architectures and their trade-offs, system specifications, and ability to work with system architects to translate system requirements into circuit requirements at IC level.Proven capability to work with digital design group for an optimum partition between digital and analog domain.Familiarity with the integration flows and challenges of wireless SoCs.Strong knowledge of desense and able to work closely with board RF/HW/Antenna teams to optimize board/module layouts for desense mitigation.Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).Extensive experience in Silicon characterization and debug.Ability to drive strong production test/QA methodologies.
Education & Experience
BS and 10+ years of relevant industry experience. MSEE and PhD is preferred.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, and reimbursement for certain educational expenses.
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Posted: Jun 13, 2024
Role Number:
200513232
Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As Sr. RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products.
Description
As a Senior RFIC Design lead, you are going to be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products. Responsibilities include:Lead design of radio transceiver chains including TX, RX, and PLL-LOGen for wireless connectivity products.Drive radio KPI (power, area, performance) to meet product requirements.Work with cross-functional teams including platform architecture, wireless design, RF HW and SW to define radio features enabling wireless innovation.Work closely with RF Systems in block level and high level specifications of the TX and RX line ups and PLL-LOGen, and proper distribution of spec margins in the chain.Hands-on design contributions starting from concept, architecture, and topology to transistor-level feasibility studies and KPI trade-off analysis to actual design, simulations, and extractions.Design of RF and Analog loopbacks for calibration and compensation.Work through Co-Existence scenarios and design to meet the CoEx requirements.Oversee the floorplan layout and verification of the design to ensure a successful tape-out.Close collaboration with RFIC test engineers in the bring up, debug and optimization of the wireless connectivity chip through the productization.Provide design versus silicon measurements correlation, and compliance with specification for a volume production.Work with the foundry team to understand the capabilities and limitations of the new technology nodes to achieve the optimum radio performance.Provide guidance on analog and RF issues across Apple.
Key Qualifications
Typically requires 10+ years of RF/analog and mixed-signal design experience in cutting-edge RF CMOS design.Direct experience in designing and bringing into mass production of wireless transceivers in deep sub-micron RFCMOS technology.Deep understanding of analog, mixed-signal and RF circuit design including design of LNAs and PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters and amplifiers, data converters and calibration methods.Deep understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, and other analog impairments.Familiarity with various RF transceiver architectures and their trade-offs, system specifications, and ability to work with system architects to translate system requirements into circuit requirements at IC level.Proven capability to work with digital design group for an optimum partition between digital and analog domain.Familiarity with the integration flows and challenges of wireless SoCs.Strong knowledge of desense and able to work closely with board RF/HW/Antenna teams to optimize board/module layouts for desense mitigation.Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).Extensive experience in Silicon characterization and debug.Ability to drive strong production test/QA methodologies.
Education & Experience
BS and 10+ years of relevant industry experience. MSEE and PhD is preferred.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, and reimbursement for certain educational expenses.
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