Hudson River Trading
Hardware Design Engineer – 2025 Grads
Hudson River Trading, New York, New York, us, 10261
Please only apply to one job posting. In the application questions below, you’ll have the opportunity to indicate if you’re interested in multiple offices and/or multiple roles. Please do not submit multiple applications for different positions/offices!
Hudson River Trading (HRT) builds custom, high-performance hardware in FPGA and ASIC technologies to support our global trading infrastructure. Design Engineers craft sophisticated digital logic solutions with nanosecond precision.
In this role, you'll work with cutting-edge technology within our distributed trading system and identify efficient ways to perform on-the-fly transformations of market data and implement mathematical models.
Qualifications
You are a full-time undergraduate student studying computer science, computer engineering, electrical engineering, or a related field who is eligible for full-time roles in 2025.
Proficiency in SystemVerilog.
Understanding of FPGA and/or ASIC design flows and tools.
Excellent digital logic design, optimization, debugging, and problem-solving skills.
Knowledge of computer architecture and network communication protocols.
Familiarity with C++ and/or Python.
Familiarity with Linux operating systems and system/processor performance.
Previous internship experience in digital logic design.
Profile
In your spare time you: code, tinker, read, explore, break things, and have an insatiable curiosity for all things hardware-related.
You do your best work when contributing to a highly collaborative team.
You can describe hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between.
You can analyze and fix problems quickly.
You really like to work with people who challenge you and make you better at what you do.
Annual base salary range of $175,000 to $250,000. Pay (base and bonus) may vary depending on job-related skills and experience. A sign-on and discretionary performance bonus will be provided as part of the total compensation package, in addition to company-paid medical and/or other benefits.
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Hudson River Trading (HRT) builds custom, high-performance hardware in FPGA and ASIC technologies to support our global trading infrastructure. Design Engineers craft sophisticated digital logic solutions with nanosecond precision.
In this role, you'll work with cutting-edge technology within our distributed trading system and identify efficient ways to perform on-the-fly transformations of market data and implement mathematical models.
Qualifications
You are a full-time undergraduate student studying computer science, computer engineering, electrical engineering, or a related field who is eligible for full-time roles in 2025.
Proficiency in SystemVerilog.
Understanding of FPGA and/or ASIC design flows and tools.
Excellent digital logic design, optimization, debugging, and problem-solving skills.
Knowledge of computer architecture and network communication protocols.
Familiarity with C++ and/or Python.
Familiarity with Linux operating systems and system/processor performance.
Previous internship experience in digital logic design.
Profile
In your spare time you: code, tinker, read, explore, break things, and have an insatiable curiosity for all things hardware-related.
You do your best work when contributing to a highly collaborative team.
You can describe hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between.
You can analyze and fix problems quickly.
You really like to work with people who challenge you and make you better at what you do.
Annual base salary range of $175,000 to $250,000. Pay (base and bonus) may vary depending on job-related skills and experience. A sign-on and discretionary performance bonus will be provided as part of the total compensation package, in addition to company-paid medical and/or other benefits.
#J-18808-Ljbffr