Lead SoC Performance Architect

The Samsung SOC Lab vision provides innovative SoC architecture, bus / memory subsystem, multimedia subsystems and key IP blocks for future Samsung Galaxy products (Smartphones, tablets and future devices). We are defining the high performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung's strategic SoC partners, Samsung MX headquarter team, and key R&D teams around the globe to innovate and reinvent technology that will positively impact millions of people around the world via the Galaxy flagship products. Position Summary: We are looking for a Lead SOC Performance Architect to build models for analysis of new SoC architectures and features for next generation mobile products. Solid architecture foundation, leadership, and SoC modelling experience is desired for success for this leadership role. Position Responsibilities: Drive high-level performance modeling effort in System C/C++ and analysis of hardware features, applications, benchmarks, and uses cases within the organization. Mentor and guide the team members to successfully deliver “SoC Architecture Laboratory” objectives. Develop complex SoC performance models to help evaluate PPA (power, performance, area) targets including CPU, GPU, ISP, NPU – particularly around mobile platforms. Analyze system-level architectural trade-offs (across mapping of workload to CPU, GPU, NPU, ISP, memory subsystems, and system software). Right size IPs within PPA constraint. Leverage industry standard tools and/or create in house tools to speed up performance evaluation and analysis. Evaluate architecture proposal performance benefits in collaboration with SoC Architects and communicate the results across related engineering audiences (SW, HW, Architecture, Leadership). Required Skills: BSc, Masters, or PhD in Computer Science/Engineering or equivalent combination of education, training, and experience. 15+ years of relevant SOC experience. Strong modelling and simulator development skills and able to code in SystemC, C++, python and similar programming languages. Proficiency in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation. Experience with industry standard performance and power modelling tools. Deep experience modelling SoC architectures and understanding the challenges involved in integrating internal/external IP and analyzing system-level performance and behavior. Knowledge of ARM CPU, Interconnect and bus protocols and memory subsystem design - including cache subsystems, GPU, NPU, ISP, Media accelerators, Display pipe, Sensor Hub, Audio processing, Power management and Security infrastructure across the SoC. Ability to evaluate architecture proposals, internal and external IP features. Leadership across hardware, software, and platform groups to align all parties to a common vision.

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