Spreadtrumusa
Wireless SoC Design Engineer/SoC Architect (All levels)
Spreadtrumusa, San Jose, California, United States, 95199
Wireless SoC Design Engineer/SoC Architect (All levels)
As a member of our engineering team, you will work on the latest WLAN technology and product development. Successful candidates will be participating in the design of leading-edge ASICs for Wireless Connectivity SoC platform. We currently have multiple openings for various levels, check below for details and apply today!
Responsibilities
As an experienced SoC designer, you will be expected to have deep knowledge of and experience in one or more major specialty functions of the SoC, such as embedded CPU cores (RISC V or ARM Cortex), high-speed serial protocols, memory controllers, AMBA or NOC interconnect, and packet processing. This position requires a high level of SoC design skills (design documentation, Verilog RTL coding, synthesis, static and formal checkers, etc.). Knowledge of RISC V or ARM embedded CPU integration is a must. Knowledge of SerDes interface protocol is a plus.Architect CPU SoC subsystem with other IP subsystemsPCIe IP integration, Evaluate and Interface in-house and/or 3rd party IP within SoC framework.ARM Processor, AMBA bus fabric, DDR5 controller and peripheral IP IntegrationDevelop and maintain ASIC design environment including scripts and make filesSeeking new methods for improving design efficiency (automation, scripting) and qualityDesign clocking and reset architecture in complex SoC multiple-clock and reset domainPhysical design planning (area, timing, power), handling of timing constraints, pipelining, timing closure tradeoffsDefine and write IP/SoC verification plan based on product requirementsSoC Chip level simulation, testing, verification, debugging and production chip test pattern generationSupport FPGA prototyping and SoC validationExperience
KNOWLEDGE, SKILLS, & COMPETENCY REQUIREMENTSFamiliar with ASIC flow from micro-architecture development, RTL coding, CRC/RDC, power analysis, Synthesis and STA and timing closure, to final tape-out and production support is required.Expertise in verification and validation of complex SoC is required.Verilog/ System Verilog programming skills is required. Other programming skills (Python, C/C++, Perl, TCL, etc.) is a plus.Verification skills (test planning, test case development, coverage) is a plus.Previous working experience on 5G or WiFi SoC, Ethernet NIC, storage SoC are highly desirable.Experience of low power designThe following traits are highly valued:Knowledge of wireless communication system SoC functionality such as WiFi, Bluetooth, UWB, 4G LTE and 5G NR is a plus.Knowledge of 802.11 (11b/a/g/n/ax/ax/be) WiFi protocol is a plus.
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As a member of our engineering team, you will work on the latest WLAN technology and product development. Successful candidates will be participating in the design of leading-edge ASICs for Wireless Connectivity SoC platform. We currently have multiple openings for various levels, check below for details and apply today!
Responsibilities
As an experienced SoC designer, you will be expected to have deep knowledge of and experience in one or more major specialty functions of the SoC, such as embedded CPU cores (RISC V or ARM Cortex), high-speed serial protocols, memory controllers, AMBA or NOC interconnect, and packet processing. This position requires a high level of SoC design skills (design documentation, Verilog RTL coding, synthesis, static and formal checkers, etc.). Knowledge of RISC V or ARM embedded CPU integration is a must. Knowledge of SerDes interface protocol is a plus.Architect CPU SoC subsystem with other IP subsystemsPCIe IP integration, Evaluate and Interface in-house and/or 3rd party IP within SoC framework.ARM Processor, AMBA bus fabric, DDR5 controller and peripheral IP IntegrationDevelop and maintain ASIC design environment including scripts and make filesSeeking new methods for improving design efficiency (automation, scripting) and qualityDesign clocking and reset architecture in complex SoC multiple-clock and reset domainPhysical design planning (area, timing, power), handling of timing constraints, pipelining, timing closure tradeoffsDefine and write IP/SoC verification plan based on product requirementsSoC Chip level simulation, testing, verification, debugging and production chip test pattern generationSupport FPGA prototyping and SoC validationExperience
KNOWLEDGE, SKILLS, & COMPETENCY REQUIREMENTSFamiliar with ASIC flow from micro-architecture development, RTL coding, CRC/RDC, power analysis, Synthesis and STA and timing closure, to final tape-out and production support is required.Expertise in verification and validation of complex SoC is required.Verilog/ System Verilog programming skills is required. Other programming skills (Python, C/C++, Perl, TCL, etc.) is a plus.Verification skills (test planning, test case development, coverage) is a plus.Previous working experience on 5G or WiFi SoC, Ethernet NIC, storage SoC are highly desirable.Experience of low power designThe following traits are highly valued:Knowledge of wireless communication system SoC functionality such as WiFi, Bluetooth, UWB, 4G LTE and 5G NR is a plus.Knowledge of 802.11 (11b/a/g/n/ax/ax/be) WiFi protocol is a plus.
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