IC Design Verification Engineer

Generous bonus, relocation assistance and/or sponsorship available for qualified applicants!This Jobot Job is hosted by: Karyn SpiesAre you a fit? Easy Apply now by clicking the "Apply" buttonand sending us your resume.Salary: $125,000 - $175,000 per yearA bit about us:Leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. These products are designed for a variety of memory modules to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing.This is a fantastic opportunity to join a successful and growing organization with an amazing culture. Interested in learning more? Apply today!Why join us? Hybrid work schedule Annual bonus Stock plan Competitive compensation Full suite of benefits Relocation assistance and/or sponsorship as neededJob DetailsWe are looking for Verification Engineers who will help develop system level UVM test benches for various DDR5 DIMM products, Power Management IC (PMIC) and also CXL 2.0 products. Your contribution would be to lead and work with other global team members in building the infrastructure for system level SoC testing. You will also be responsible to functionally verify the system and IP components, using System Verilog and mixed signal verification techniques.Responsibilities: Knowledgeable in DDR5 DIMM system level verification and PMIC IP verification Collaborate closely with component testing verification teams across our global sites Interface with other engineering functions such as Design, Product, Spec Engineering Be involved in silicon debug when necessary Develop, drive, and implement UVM System Verilog Testbench and infrastructure Develop stimulus, coverage, SV assertions, and scripts as necessary. Provide mentorship to junior engineers Debug regressions and failing simulationsJob Qualifications: BS or MS in Electrical Engineering, Computer Engineering or equivalent 5+ years of relevant work experience Good understanding of CMOS circuit design Strong understanding and hands-on experience in building UVM Testbenches from scratch Proficient with digital and analog simulation tools, such as VCS, Xcellieum, or Verdi Excellent debugging and problem-solving skills Strong understanding of DDR5 protocol or CXL 2.0 specInterested in hearing more? Easy Apply now by clicking the "Apply" button.