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Physical Design Engineer
ZipRecruiter - Sunnyvale, CA, US, 94087 4 days ago
Job DescriptionWe are looking for a highly skilled Physical Design Engineer to work at block level and/or top level...
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Physical Design Engineer - Sunnyvale CA
ZipRecruiter - Los Angeles, California, United States 25 days ago
Role: Physical Design Engineer
Location: Sunnyvale, CA
Experience: 5 to 15 years
Full Time Only
Job Overview:
We are looking for a highly skilled...
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ASIC Physical Design Engineer
Efficient Computer - Santa Clara, CA, US, 95053 5 days ago
Efficient Computer is looking for an ASIC Physical Design Engineer in Santa Clara, CA.This local job opportunity with ID 3035...
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ASIC Physical Design Engineer
Efficient Computer - San Francisco 19 hours ago
If you are anASIC Physical Design Engineerwho wants to impact the transformation of the next evolution of computing, we would like...
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Senior Physical Design Engineer
NVIDIA Corporation - Santa Clara, CA, US, 95053 1 days ago
Senior Physical Design Engineer
Apply locations US, CA, Santa Clara US, TX, Austin time type Full time posted on Posted 30+ Days Ago job...
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ASIC Physical Design Engineer
Efficient Computer - San Francisco, CA, US, 94199 3 days ago
If you are an ASIC Physical Design Engineer who wants to impact the transformation of the next evolution of computing, we would like to ta...
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Senior Physical Design Engineer
NVIDIA Corporation - Santa Clara 15 days ago
Senior Physical Design Engineer Apply locations US, CA, Santa Clara US, TX, Austin time type Full time posted on Posted 30+ Days Ago job re...
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ASIC Physical Design Engineer
Efficient Computer - San Francisco 15 days ago
If you are an ASIC Physical Design Engineer who wants to impact the transformation of the next evolution of computing, we would like to t...
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ASIC Physical Design Engineer
Efficient Computer - San Francisco, California, United States, 94199 1 months ago
If you are anASIC Physical Design Engineerwho wants to impact the transformation of the next evolution of computing, we would like...
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Go to next pageTalent Groups - Sunnyvale, CA, US, 94087
Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI
Physical Design Engineer-ASICs, SoCs, VLSI
Full time
Sunnyvale, CA
Job Description:
Key Responsibilities:
Block-Level Physical Design:
- Floorplanning & Partitioning – Define optimal floorplan with power grid, macro placements, and congestion analysis.
- Strong scripting experience.
- Placement & Optimization – Perform standard cell placement, legalization, and optimization to improve area, power, and timing.
- Clock Tree Synthesis (CTS) – Design and optimize low-skew, high-performance clock networks.
- Routing & DRC Closure – Ensure successful global and detailed routing, meeting design rule constraints.
- Timing Closure – Work on setup/hold timing violations, signal integrity, and cross-talk reduction using static timing analysis (STA).
- Power & IR Drop Analysis – Optimize power planning, power integrity (IR drop, EM), and leakage reduction techniques.
Top-Level Physical Design:
- Chip-Level Floorplanning & Hierarchical Design – Manage top-level layout planning, pin assignments, and cross-block optimizations.
- Strong scripting experience.
- Clock & Power Distribution – Design robust clock trees and power delivery networks (PDN).
- Integration of IP & Sub-blocks – Ensure seamless integration of IP blocks and handle complex routing challenges.
- Chip Assembly & Sign-Off – Perform final netlist-to-GDSII implementation, addressing physical and electrical verification.
- DFT Integration – Work with Design for Test (DFT) teams to ensure scan chain connectivity and testability.
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Information Technology
Industries
IT Services and IT Consulting
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Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI
