Synopsys
Principal Solutions Engineer
Synopsys, Sunnyvale, California, United States, 94087
Emulation and Prototyping has become critical & indispensable part of SoC designs verification with growing design size and complexity. Shift Left on overall validation of the functional and performance intent of the ASIC/SoC/Chip DUT in a system level involving Application SW, drivers/SDK, Operating Systems of interest, Industry standard test/traffic/Exerciser & debug tools is the focus of Verification Solutions Product Engineering group. As a core part of this focus, we develop innovative solutions around Virtual transactors, third-party and/or customer specific test infrastructure.
Looking for a Product Engineer to be part of Speed Adapter Solutions Product Engineering Team to help drive PCIe, CXL, Enet, USB and UFS SA product deployments, working in close collaboration with customers, development & Product validation teams, leading to successful deployment of overall solution.
Roles and Responsibilities:
Supporting the Synopsys Speed Adaptors products across emulation and prototyping platforms.
Responsible for protocol debug at RTL and system level.
Bring up of Solutions on customer designs as needed working with AE teams.
Creating use cases / prototype designs based on customer needs and showcase the feasibility of solutions.
Ability to regress the solution and make use of software for real world validation.
Track and debug customer issues and work with R&D team on issue resolution.
Managing the existing requests, assign appropriate priorities to bug fixes and new feature developments.
Ability to co-relate issues at various stages architecture, RTL, Pre and Post-Silicon.
Managing the release process to ensure that the product is released on time and contains the enhancements that were planned.
Requirements:
MS with 8+ or BS with 10+ Years of experience in Simulation, Emulation, Prototyping or ASIC design/verification.
Knowledge of at-least a few key protocol’s like PCIe, CXL, Enet, UFS, USB, Sata.
Strong trouble shooting and problem-solving skills;
Experience in SoC design porting on emulators and/or prototyping solution, creating FPGA friendly interfaces, adoption of testbench environment and prototyping SoC environment w/ debug is highly preferred.
Domain knowledge in one or more areas: Networking, Storage, Automotive, Peripherals and CPU Subsystem.
Working knowledge of post silicon validation setups is a plus.
Use of exercisers and analyzers is a plus.
Excellent customer interface, communication, and planning skills.
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Looking for a Product Engineer to be part of Speed Adapter Solutions Product Engineering Team to help drive PCIe, CXL, Enet, USB and UFS SA product deployments, working in close collaboration with customers, development & Product validation teams, leading to successful deployment of overall solution.
Roles and Responsibilities:
Supporting the Synopsys Speed Adaptors products across emulation and prototyping platforms.
Responsible for protocol debug at RTL and system level.
Bring up of Solutions on customer designs as needed working with AE teams.
Creating use cases / prototype designs based on customer needs and showcase the feasibility of solutions.
Ability to regress the solution and make use of software for real world validation.
Track and debug customer issues and work with R&D team on issue resolution.
Managing the existing requests, assign appropriate priorities to bug fixes and new feature developments.
Ability to co-relate issues at various stages architecture, RTL, Pre and Post-Silicon.
Managing the release process to ensure that the product is released on time and contains the enhancements that were planned.
Requirements:
MS with 8+ or BS with 10+ Years of experience in Simulation, Emulation, Prototyping or ASIC design/verification.
Knowledge of at-least a few key protocol’s like PCIe, CXL, Enet, UFS, USB, Sata.
Strong trouble shooting and problem-solving skills;
Experience in SoC design porting on emulators and/or prototyping solution, creating FPGA friendly interfaces, adoption of testbench environment and prototyping SoC environment w/ debug is highly preferred.
Domain knowledge in one or more areas: Networking, Storage, Automotive, Peripherals and CPU Subsystem.
Working knowledge of post silicon validation setups is a plus.
Use of exercisers and analyzers is a plus.
Excellent customer interface, communication, and planning skills.
#J-18808-Ljbffr