Blackrock Neurotech
Senior Physical Designer
Blackrock Neurotech, Salt Lake City, Utah, United States, 84193
Our Mission
Blackrock Neurotech is 100% focused on improving human lives through neuroscience research and technology. The passion and dedication behind this mission has nurtured a dynamic, enjoyable and fulfilling corporate environment in which learning and growth are commonplace. We operate in an innovative field that requires our staff to meet the highest standards. Every step of the way, we encourage one another by providing continuous motivation and promoting a healthy work environment.
Job Title:
Senior Physical Designer
Department:
BCI
Job Reports To:
Head of BCI
Location:
Salt Lake City or Remote
POSITION OVERVIEW:
The Physical Designer engineer will work on novel state of the art BCI systems featuring custom ASICs. The Physical Designer engineer will support the design of the ASIC and will collaborate with the ASIC AMS designers/manufacturing teams and system level engineers during R&D to ensure successful tapeouts.
QUALIFICATION REQUIREMENTS
PhD in electrical engineering or computer engineering.
Minimum 5 years of experience in physical design and ASIC design.
IDEAL COMPETENCIES
Siemens/Synopsys/Cadence tools.
Strong debugging skills.
Strong scripting skill with languages like TCL, Perl, or Python for automation tasks.
Knowledge in ASIC design flow from spec to test and validation.
Knowledge in complex SoC and active interposer assembly.
Knowledge in medical devices.
ESSENTIAL JOB DUTIES
The Physical Design Engineer is responsible for integrating analog and mixed signal IPs, as well as high-speed interfaces, into subsystems or AMS components. They collaborate with package and platform teams to ensure seamless AMS integration.
They support pathfinding studies during silicon development and provide feedback to the silicon and packaging teams regarding AMS integration and tradeoffs. The engineer guides the integration process from specification documentation to silicon tapeout and offers debugging support for analog functionality-related issues in the product.
Their expertise lies in PnR and design verification flows, understanding packaging effects, and managing integration challenges in AMS designs to achieve optimal overall circuit performance.
They closely collaborate with analog IP, SoC architecture, SoC design, package, and platform design functions to meet the analog specification requirements for the product.
Physical and other requirements
Ability to work in an office setting.
Sitting and standing while typing.
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Blackrock Neurotech is 100% focused on improving human lives through neuroscience research and technology. The passion and dedication behind this mission has nurtured a dynamic, enjoyable and fulfilling corporate environment in which learning and growth are commonplace. We operate in an innovative field that requires our staff to meet the highest standards. Every step of the way, we encourage one another by providing continuous motivation and promoting a healthy work environment.
Job Title:
Senior Physical Designer
Department:
BCI
Job Reports To:
Head of BCI
Location:
Salt Lake City or Remote
POSITION OVERVIEW:
The Physical Designer engineer will work on novel state of the art BCI systems featuring custom ASICs. The Physical Designer engineer will support the design of the ASIC and will collaborate with the ASIC AMS designers/manufacturing teams and system level engineers during R&D to ensure successful tapeouts.
QUALIFICATION REQUIREMENTS
PhD in electrical engineering or computer engineering.
Minimum 5 years of experience in physical design and ASIC design.
IDEAL COMPETENCIES
Siemens/Synopsys/Cadence tools.
Strong debugging skills.
Strong scripting skill with languages like TCL, Perl, or Python for automation tasks.
Knowledge in ASIC design flow from spec to test and validation.
Knowledge in complex SoC and active interposer assembly.
Knowledge in medical devices.
ESSENTIAL JOB DUTIES
The Physical Design Engineer is responsible for integrating analog and mixed signal IPs, as well as high-speed interfaces, into subsystems or AMS components. They collaborate with package and platform teams to ensure seamless AMS integration.
They support pathfinding studies during silicon development and provide feedback to the silicon and packaging teams regarding AMS integration and tradeoffs. The engineer guides the integration process from specification documentation to silicon tapeout and offers debugging support for analog functionality-related issues in the product.
Their expertise lies in PnR and design verification flows, understanding packaging effects, and managing integration challenges in AMS designs to achieve optimal overall circuit performance.
They closely collaborate with analog IP, SoC architecture, SoC design, package, and platform design functions to meet the analog specification requirements for the product.
Physical and other requirements
Ability to work in an office setting.
Sitting and standing while typing.
#J-18808-Ljbffr