Synopsys, Inc.
Principal Engineer - ASIC Architecture, Digital Design/Verification
Synopsys, Inc., Sunnyvale, California, United States, 94087
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars, Artificial Intelligence, the cloud, 5G, and the Internet of Things. These breakthroughs are ushering in the Era of Smart Everything, and we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Principal Engineer, ASIC Architecture, Digital Design/VerificationResponsibilities
Architecting, Designing and Verifying high speed mixed-signal PHYs like PCIe, Ethernet, USB.Roles available in all these areas - working on new variants of these protocols.
Key Requirements
Requires high attention to detail and good communication skills as well as a proven track record in similar areas.Bachelors or Masters with a minimum of 12 years of industry experience.Roles are flexible location wise in Ontario - preference is some office presence in GTA or Ottawa office.
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At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars, Artificial Intelligence, the cloud, 5G, and the Internet of Things. These breakthroughs are ushering in the Era of Smart Everything, and we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Principal Engineer, ASIC Architecture, Digital Design/VerificationResponsibilities
Architecting, Designing and Verifying high speed mixed-signal PHYs like PCIe, Ethernet, USB.Roles available in all these areas - working on new variants of these protocols.
Key Requirements
Requires high attention to detail and good communication skills as well as a proven track record in similar areas.Bachelors or Masters with a minimum of 12 years of industry experience.Roles are flexible location wise in Ontario - preference is some office presence in GTA or Ottawa office.
#J-18808-Ljbffr