d-Matrix
Emulation Engineer, Senior Staff
d-Matrix, Santa Clara, California, us, 95053
Location:
Santa Clara, CA
Type:
Full time
Department:
R&D - HW Verification & Modeling
Compensation:
IC5
$161.3K – $260K • Offers Equity • Offers Commission
The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. An investment in your future is an investment in ours.
d-Matrix has fundamentally changed the physics of memory-compute integration with our digital in-memory compute (DIMC) engine. The “holy grail” of AI compute has been to break through the memory wall to minimize data movements. We’ve achieved this with a first-of-its-kind DIMC engine. Having secured over $154M, $110M in our Series B offering, d-Matrix is poised to advance Large Language Models to scale Generative inference acceleration with our chiplets and In-Memory compute approach. We are on track to deliver our first commercial product in 2024. We are poised to meet the energy and performance demands of these Large Language Models.
The company has 100+ employees across Silicon Valley, Sydney and Bengaluru. Our pedigree comes from companies like Microsoft, Broadcom, Inphi, Intel, Texas Instruments, Lucent, MIPS and Wave Computing. Our past successes include building chips for all the cloud hyperscalers globally - Amazon, Facebook, Google, Microsoft, Alibaba, Tencent along with enterprise and mobile operators like China Mobile, Cisco, Nokia, Ciena, Reliance Jio, Verizon, AT&AT. We are recognized leaders in the mixed signal, DSP connectivity space, now applying our skills to next generation AI.
Location:
Hybrid, working onsite at our Santa Clara, CA headquarters 3 days per week.
What You Will Do:
As part of this team you will create an emulation environment using advanced emulation techniques (use of Speedbridge, UVM testbenches, DPI to interact C/C++ for transactor generation). You will create emulation flow and Bring up SoC on emulation platform. You will also collaborate with Design verification team as well as with software team.
What You Will Bring:
BSEE, MSEE Electrical Engineering with Experience working with an Emulation platform (such as Palladium, Velloce or Zebu, etc.).
Understands System Verification, C/C++, UVM as well as waveforms debug in emulation/verification environment.
Experience in writing scripts (Python, Perl).
MS (EE or CS) or equivalent with multi-year relevant experience.
Equal Opportunity Employment Policy:
d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.
d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of all applicants. Thank you for your understanding and cooperation.
#J-18808-Ljbffr
Santa Clara, CA
Type:
Full time
Department:
R&D - HW Verification & Modeling
Compensation:
IC5
$161.3K – $260K • Offers Equity • Offers Commission
The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. An investment in your future is an investment in ours.
d-Matrix has fundamentally changed the physics of memory-compute integration with our digital in-memory compute (DIMC) engine. The “holy grail” of AI compute has been to break through the memory wall to minimize data movements. We’ve achieved this with a first-of-its-kind DIMC engine. Having secured over $154M, $110M in our Series B offering, d-Matrix is poised to advance Large Language Models to scale Generative inference acceleration with our chiplets and In-Memory compute approach. We are on track to deliver our first commercial product in 2024. We are poised to meet the energy and performance demands of these Large Language Models.
The company has 100+ employees across Silicon Valley, Sydney and Bengaluru. Our pedigree comes from companies like Microsoft, Broadcom, Inphi, Intel, Texas Instruments, Lucent, MIPS and Wave Computing. Our past successes include building chips for all the cloud hyperscalers globally - Amazon, Facebook, Google, Microsoft, Alibaba, Tencent along with enterprise and mobile operators like China Mobile, Cisco, Nokia, Ciena, Reliance Jio, Verizon, AT&AT. We are recognized leaders in the mixed signal, DSP connectivity space, now applying our skills to next generation AI.
Location:
Hybrid, working onsite at our Santa Clara, CA headquarters 3 days per week.
What You Will Do:
As part of this team you will create an emulation environment using advanced emulation techniques (use of Speedbridge, UVM testbenches, DPI to interact C/C++ for transactor generation). You will create emulation flow and Bring up SoC on emulation platform. You will also collaborate with Design verification team as well as with software team.
What You Will Bring:
BSEE, MSEE Electrical Engineering with Experience working with an Emulation platform (such as Palladium, Velloce or Zebu, etc.).
Understands System Verification, C/C++, UVM as well as waveforms debug in emulation/verification environment.
Experience in writing scripts (Python, Perl).
MS (EE or CS) or equivalent with multi-year relevant experience.
Equal Opportunity Employment Policy:
d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.
d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of all applicants. Thank you for your understanding and cooperation.
#J-18808-Ljbffr