Micron Memory Malaysia Sdn Bhd
Principal Engineer - HBM Design | Architecture - TPG
Micron Memory Malaysia Sdn Bhd, Atlanta, Texas, United States, 75551
Our Opportunity Summary:For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.As an HBM Design Architect, you will be responsible for the design & development of next-generation HBM DRAM products. You will be part of a highly multi-functional team of technical domain experts collaborating closely with a distributed team of Design Engineering, Product Engineering, Process Development, Package Engineering & Business Units to implement a common goal of ensuring our future HBM roadmap is successful. You will apply your deep understanding of memory array architectures, high-speed interface design, logic & custom circuit design, memory subsystem operation, high-performance computing architectures, and 2.5D & 3D package integration to understand and analyze bottlenecks and propose innovative architectures to target best-in-class performance, power, cost, reliability and quality for Micron’s HBM product portfolio.Job title and level can scale depending on experience and qualificationsIn HBM DEG (High Bandwidth Memory - DRAM Engineering Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison.Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.(Disclaimer):
While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of best-in-class engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.What’s Encouraged Daily:Pathfinding to explore new architectures for future products and make recommendations after performing highly technical feasibility analysesFocus areas within the team will include memory array architectures, on-die and off-die high-speed signaling, PHY & interface development, power delivery network planning and optimization, power consumption reduction, CMOS requirements identification, packaging technologies, and thermal modelingDebug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architecturesEngage with Customers to support issues with current HBM architectures and find opportunities to innovate on future HBM solutionsHow To Qualify:Familiarity with DRAM operation and JEDEC specifications, preferably with the HBM product familyKnowledge and experience in digital (Verilog) and analog (FastSpice & Hspice) modeling and simulationsIn-depth technical expertise in one or more areas - DRAM memory array design, high-speed clocking and interface development, logic and custom circuit design, power delivery optimization, CMOS & semiconductor device physics, 2.5D and 3D packaging technologiesProven track record of innovation and problem-solving in high-performance memory development7+ years of relevant job/skill-related experienceExperience delivering highly technical solutionsWhat Sets You Apart:BSEE or greaterIn-depth technical expertise in one or more areas: RTL Design flow, in the DRAM process or Foundry process - DRAM product bring-up and debug - package technologies (TSV, hybrid bonding, interposers, etc)Good verbal and written communication skills with the ability to efficiently synthesize and convey sophisticated technical concepts to other partners and leadershipA self-motivated, hard-working team player who enjoys working with diverse abilities and backgroundsHaving an innovative approach that is open to improving upon any of our processes or products.Potential Team Member Locations:Folsom, CAAtlanta, GAAllen, TX
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While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of best-in-class engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.What’s Encouraged Daily:Pathfinding to explore new architectures for future products and make recommendations after performing highly technical feasibility analysesFocus areas within the team will include memory array architectures, on-die and off-die high-speed signaling, PHY & interface development, power delivery network planning and optimization, power consumption reduction, CMOS requirements identification, packaging technologies, and thermal modelingDebug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architecturesEngage with Customers to support issues with current HBM architectures and find opportunities to innovate on future HBM solutionsHow To Qualify:Familiarity with DRAM operation and JEDEC specifications, preferably with the HBM product familyKnowledge and experience in digital (Verilog) and analog (FastSpice & Hspice) modeling and simulationsIn-depth technical expertise in one or more areas - DRAM memory array design, high-speed clocking and interface development, logic and custom circuit design, power delivery optimization, CMOS & semiconductor device physics, 2.5D and 3D packaging technologiesProven track record of innovation and problem-solving in high-performance memory development7+ years of relevant job/skill-related experienceExperience delivering highly technical solutionsWhat Sets You Apart:BSEE or greaterIn-depth technical expertise in one or more areas: RTL Design flow, in the DRAM process or Foundry process - DRAM product bring-up and debug - package technologies (TSV, hybrid bonding, interposers, etc)Good verbal and written communication skills with the ability to efficiently synthesize and convey sophisticated technical concepts to other partners and leadershipA self-motivated, hard-working team player who enjoys working with diverse abilities and backgroundsHaving an innovative approach that is open to improving upon any of our processes or products.Potential Team Member Locations:Folsom, CAAtlanta, GAAllen, TX
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