Qualcomm
Wireless PHY HW Design Sr Lead Engineer
Qualcomm, Oregon, Illinois, United States, 61061
Company:
Qualcomm India Private LimitedJob Area:
Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking Staff/Senior Staff VLSI Digital Design Engineers to lead IP development for the latest WiFi standards.
Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently.
The WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains – all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication systems and finding innovative solutions to counter them.
The team works extensively on typical signal processing functions like filters, matrix transformations (e.g.: QR, Cholesky decomposition), channel estimation, equalization (MMSE, MRC, ML), decoders/encoders (e.g.: LDPC, Viterbi), demodulators, FFT etc. on a day-to-day basis, and contributes to the development/ enhancement/ evaluation of signal processing algorithms to cater to new requirements.
We are looking for someone as passionate as us and takes pride in their work.
Qualcomm is at the forefront of the WiFi revolution, aiming to become the global leader in WiFi chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision.
Requirements:Looking for a candidate with 2 to 6 years of hands-on experience in micro-architecting and developing complex IPs.
Expertise in digital design, VLSI concepts, and experience in creating power/area-efficient IPs across multiple clock domains are essential.
Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected.
Candidates should be capable of proposing design alternatives to meet area/power/performance specifications and presenting these options for review.
Experience in leading, guiding, or managing junior team members is advantageous.
Repeated success in taking IP designs from requirements to silicon is required.
While not mandatory, having developed IPs for wireless technologies (WLAN, LTE, NR, BT, UWB, etc.) or past HLS experience would be beneficial.
Role/Responsibility:You will be responsible for owning and leading one of the critical and complex WLAN PHY IPs, ensuring alignment with the company's strategic goals and contributing to Qualcomm's leadership in the WiFi market.
Your role involves close collaboration with the Systems team from the concept phase to finalizing IP requirements.
You will be responsible for gathering requirements, uArch and delivering quality RTL (and/or HLS) after all the required RTL QA checks (Lint, CDC etc).
Additionally, you will be responsible for identifying power/area/performance improvements and propose solutions for the same.
Develop timing constraints, working with implementation/PD teams in resolving any timing issues.
Work closely with cross-functional teams like Verification/Emulation/Software/Systems teams and participate in pre/post Silicon and end customer debugs.
Skills:Must have:
Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging complex data-path/control-path IPs. Good communication, analytical & leadership skills.
Good to have:
System Verilog, Visio, Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax), experience with HLS.
Minimum Qualifications:Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
#J-18808-Ljbffr
Qualcomm India Private LimitedJob Area:
Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking Staff/Senior Staff VLSI Digital Design Engineers to lead IP development for the latest WiFi standards.
Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently.
The WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains – all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication systems and finding innovative solutions to counter them.
The team works extensively on typical signal processing functions like filters, matrix transformations (e.g.: QR, Cholesky decomposition), channel estimation, equalization (MMSE, MRC, ML), decoders/encoders (e.g.: LDPC, Viterbi), demodulators, FFT etc. on a day-to-day basis, and contributes to the development/ enhancement/ evaluation of signal processing algorithms to cater to new requirements.
We are looking for someone as passionate as us and takes pride in their work.
Qualcomm is at the forefront of the WiFi revolution, aiming to become the global leader in WiFi chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision.
Requirements:Looking for a candidate with 2 to 6 years of hands-on experience in micro-architecting and developing complex IPs.
Expertise in digital design, VLSI concepts, and experience in creating power/area-efficient IPs across multiple clock domains are essential.
Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected.
Candidates should be capable of proposing design alternatives to meet area/power/performance specifications and presenting these options for review.
Experience in leading, guiding, or managing junior team members is advantageous.
Repeated success in taking IP designs from requirements to silicon is required.
While not mandatory, having developed IPs for wireless technologies (WLAN, LTE, NR, BT, UWB, etc.) or past HLS experience would be beneficial.
Role/Responsibility:You will be responsible for owning and leading one of the critical and complex WLAN PHY IPs, ensuring alignment with the company's strategic goals and contributing to Qualcomm's leadership in the WiFi market.
Your role involves close collaboration with the Systems team from the concept phase to finalizing IP requirements.
You will be responsible for gathering requirements, uArch and delivering quality RTL (and/or HLS) after all the required RTL QA checks (Lint, CDC etc).
Additionally, you will be responsible for identifying power/area/performance improvements and propose solutions for the same.
Develop timing constraints, working with implementation/PD teams in resolving any timing issues.
Work closely with cross-functional teams like Verification/Emulation/Software/Systems teams and participate in pre/post Silicon and end customer debugs.
Skills:Must have:
Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging complex data-path/control-path IPs. Good communication, analytical & leadership skills.
Good to have:
System Verilog, Visio, Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax), experience with HLS.
Minimum Qualifications:Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
#J-18808-Ljbffr