Electrical Validation Hardware Manager

As an Electrical Validation Manager at Astera Labs, you will join a dedicated Hardware Engineering team responsible for designing boards that incorporate Astera Labs' range of connectivity products.These products are utilized by leading cloud service providers, server manufacturers, and network OEMs. Your primary responsibility will involve collaborating closely with EE and ASIC designers to develop and implement electrical validation plans for various Astera products.Additionally, you will support manufacturing activities and contribute to other company initiatives. The ideal candidate for this role should possess industry experience, think innovatively, and demonstrate expertise in their field. Furthermore, they should exhibit a "do what it takes" attitude, willing to assist and contribute wherever necessary to solve problems effectively.Key responsibilities:Develop (jointly with EE) and execute an electrical test planDefine testing methodologiesTroubleshoot failuresSpecify test equipment, develop test fixtures, help improve hardware labPerform rework as neededSupport various design and manufacturing initiativesBasic Qualifications:Strong academic and technical background in electrical engineering. A bachelor's in EE or equivalent experience is required.Minimum of 10 years experience in testing or design.Entrepreneurial, open-minded behavior, and can-do attitude. Think and act with the customer in mind!Required Experience:Strong understanding of electronics and test approachAbility to take basic test description (with minimal details) and execute + document results + troubleshoot failuresGood problem-solving skillsGood documentation skillsWorking knowledge of schematics + layout tools (able to read designs)Track record of working on complex electronic productsExperience with lab equipment (scopes, VNA, TDR, e-loads, environmental chambers)Preferred experience:EE design experience. Working knowledge of schematic capture and PCB layout tools from Cadence, Altium, and others.Experience with measurements of high-speed interfaces (PCIe, DDR, 25/50G/100G SerDes)PLM experience with Arena or equivalentAbility to develop (vs execute) test planExperience with EMI/EMC complianceTechnical writing skills to generate clear, precise documentation such as manufacturing instruction/rework/deviation documents.Experience with ASIC/silicon development processExperience working with CMs (off-shore a plus)