Senior Physical Design Engineer
Quest Global, Mountain View, CA, United States
Be part of a diverse team that pushes boundaries, developing silicon solutions that power the future. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
About the job
Minimum qualifications:
• Develop and own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes.
• Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
• Deliver physical design of an end-to-end IP or integration of ASIC/SoC design
Must Have:
• 6 years of relevant physical design experience
• Experience in running physical-aware logic synthesis and achieving optimal synthesis QoR on low power designs
• Knowledge of static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.
• Experience in Block-level and Full-chip floor-planning, power grid planning
• Experience with custom or regular clock tree synthesis implementation at block level or top level, and clock power reduction techniques.
• Experience with Python, TCL, Perl programming
Wish List/ Nice to Have:
• MSEE/CS or equivalent experience
Education
• Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
• Master's Degree preferred but not required