RTL Development Engineer

RTL Development Engineer (FPGA Expert)

San Diego, CA Day 1 onsite ( 3 days a week hybrid)

Long term

Required Qualifications:

• 10+ years of hands-on experience in RTL design for FPGAs, including Xilinx/AMD devices.
• Extensive experience with Xilinx Vivado Design Suite, including synthesis, simulation, and debugging.
• Solid understanding of FPGA architecture, timing analysis, and clock domain crossing (CDC) techniques.
• Expertise in VHDL/Verilog/SystemVerilog coding for RTL design.
• Experience with FPGA verification methodologies (simulation, constrained random testing, etc.)