Principal Product Engineer - Verification and Debug (R48016/ns)

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Principal Product Engineer

Location: San Jose, CA

Reports to: Product Engineering Director

Job Overview:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are looking for a Product Engineer (PE) to lead and drive customer engagement to solve verification challenges with leading edge technologies and methodologies such as vManager.

The main roles for the PE will be the cooperation with key customers to deploy advanced verification and debug solutions and follow-up with the development groups, discuss priorities and review functional specification for the customer requirements.

The PE will be also responsible to educate the field on new solution and methodologies in cooperation with the Business Unit

Responsibilities include, but are not limited to:

• Understand customer challenges and drive requirements to the development teams, understanding priority, value, and timeliness of the ultimate solution.
• Support the development of key verification flows and methodologies to improve the Smart Verification Solutions at Cadence focusing on the unique requirements of the design and verification community.
• Help develop strategy and technology roadmaps for product engineering Smart Verification flows and related applications that drive the value of the full Cadence verification suite.
• Write requirement specifications and review functional specifications to ensure relevant solutions are provided to customers.

Qualifications:

• BS with a minimum of 7 years of experience OR MS with a minimum of 5 years of experience OR PhD with a minimum of 1 year of experience
• Knowledgeable on EDA tools and verification solution (Cadence or others)
• Expertise in Functional Verification flows e.g. coverage driven verification, constrained random testing, etc.
• Knowledgeable on design and verification languages and methodologies like SystemVerilog, VHDL, C/C++ UVM, ‘e’
• Experience and understanding of client/server technologies, database architectures, big data and/or machine learning are a plus.
• Some expertise on scripting language like Phyton, Perl, Tcl are a plus.
• Knowledgeable on formal methods is a plus.
• Strong verbal and written communication skills in English, including presentation skills, and team working.
• Willing to travel worldwide in order to work closely with customers in any part of the world.
• Passionate about adopting and promoting new technologies and making customers successful.
• Ability to build and deliver training content for rolling out new products/methodologies.