AXONNE
ASIC Synthesis/STA Engineer
AXONNE, San Jose, California, United States, 95101
Company Overview:Axonne Inc. is a Silicon Valley startup that provides cutting-edge semiconductor solutions for the automotive industry with innovative in-vehicle network semiconductor solutions. We are dedicated to delivering high-performance, reliable, and state-of-the-art semiconductor products to meet the demanding requirements of automotive electronics. As we continue to grow and expand, we are seeking a dynamic and experienced ASIC Synthesis/STA Engineer to join our team and play a key role in enabling the adoption of our high-speed Ethernet semiconductor solutions in the automotive sector.
Key Responsibilities:Develop and execute Synthesis, DFT, static timing analysis flows.Provide support for ASIC tools and flows and develop standardized CAD flows.Interface with various digital design teams who will be requesting deployment, training, and maintenance of tools and flows.Collaborate with EDA vendors and other external tool developers as needed to debug critical issues and find workarounds as needed.Enable design teams to meet targets by closely supporting and troubleshooting CAD flow usage.Work with design teams to enable power optimizations by annotating activity in TCF/SAIF formats.Manage and deploy technology specific PDKs.
QualificationsBS (or equivalent) in Computer Science or Electrical or Computer Engineering and 5 years of ASIC Implementation experience; MS preferred with 5 yearsSome exposure to CAD/Flow development.Strong scripting and automation skills using Tcl/PythonExperience with ASIC front-end design flows, including synthesis, formal equivalence checking, as well as lint & CDC checks.Knowledge of STA and DFT.Be able to independently troubleshoot digital tool flow usage and deploy solutions.Fluency in the Linux environment and strong knowledge of the Linux command line is a must.Excellent verbal and written communication skills.Experience with DevOps concepts and compute farm interaction is a plus.
Axonne is an equal-opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees.
Key Responsibilities:Develop and execute Synthesis, DFT, static timing analysis flows.Provide support for ASIC tools and flows and develop standardized CAD flows.Interface with various digital design teams who will be requesting deployment, training, and maintenance of tools and flows.Collaborate with EDA vendors and other external tool developers as needed to debug critical issues and find workarounds as needed.Enable design teams to meet targets by closely supporting and troubleshooting CAD flow usage.Work with design teams to enable power optimizations by annotating activity in TCF/SAIF formats.Manage and deploy technology specific PDKs.
QualificationsBS (or equivalent) in Computer Science or Electrical or Computer Engineering and 5 years of ASIC Implementation experience; MS preferred with 5 yearsSome exposure to CAD/Flow development.Strong scripting and automation skills using Tcl/PythonExperience with ASIC front-end design flows, including synthesis, formal equivalence checking, as well as lint & CDC checks.Knowledge of STA and DFT.Be able to independently troubleshoot digital tool flow usage and deploy solutions.Fluency in the Linux environment and strong knowledge of the Linux command line is a must.Excellent verbal and written communication skills.Experience with DevOps concepts and compute farm interaction is a plus.
Axonne is an equal-opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees.