Tripod Networking
ASIC EDA Engineer
Tripod Networking, San Jose, California, United States, 95101
Will consider relocation.Open to doing H1 transfers.
10+ years of hands-on ASIC engineering experienceSolid VLSI/SoC chip design and verification workflowsExp. with ASIC EDA tool suites from Synopsys and/or Cadence, for physically-aware logic synthesis, RTL and gate-level simulation, structural analysis (CDC, RDC, etc.) and lint toolsStrong SystemVerilog exp.Exp. with C/C++, Perl, TCL and PythonExperience developing tools for design verification scripting
10+ years of hands-on ASIC engineering experienceSolid VLSI/SoC chip design and verification workflowsExp. with ASIC EDA tool suites from Synopsys and/or Cadence, for physically-aware logic synthesis, RTL and gate-level simulation, structural analysis (CDC, RDC, etc.) and lint toolsStrong SystemVerilog exp.Exp. with C/C++, Perl, TCL and PythonExperience developing tools for design verification scripting