ASIC Architect

San Jose, CA Full-time $200,000.00 - $280,000.00Posted 10/10/2024Job Title: ASIC ArchitectJob Location: San Jose, CACompensation: $200K - $280K base Depending on experience plus stock options!Requirements: ASIC Architect, SoC Security Architecture, Microarchitecture, ARM CPU Subsystem, InterconnectWe were founded in 2020 by a team of veterans in Silicon Valley, and our mission is to accelerate AI computing in data centers and HPC by introducing high-performance, power efficient, scalable and cost-effective interconnect solutions. AI computing and data center architectures are undergoing a fundamental transformation of disaggregation and composability, driven by the enablement of CXL (Computing Express Link) technology.We are working on a CXL/PCIe-based chip for cloud computing applications. We're expanding our team and looking to add an ASIC Architect to our team!Top Reasons to Work with Us1) Competitive Compensation ($200K - $280K base Depending on Experience)2) Comprehensive Benefits package including stock options!3) The chance to join a small start-up tackling challenging problems with huge upside potential!What You Will Be DoingThe ASIC Architect is a senior technical leader in the company, steering the capability progression of our leading-edge switch SoC and innovating to keep our products the technology leader in the market. The ASIC Architect takes up the hardware architecture end-to-end lifecycle ownership of our SoC products.Collaborate with our marketing and business development teams to identify use cases with impactful value for customers.Collaborate with all the technical teams (RTL, Physical Design, Systems, Software) to deliver new SoC architecture features and defining the Software/Hardware Co-Designs to efficiently enable such use cases.Perform detailed performance analysis of the architecture features, applications, benchmarks, power-performance-area trade-off. Where applicable, you will employ performance modeling for complex use cases.Exercise your domain expertise in one or multiple areas. These include Embedded CPU Subsystem, Platform Security, PCIe Interconnect, CXL Interconnect, Ethernet Interconnect, Data Network Switching, Power Management.Author the hardware specifications and architectural validation plan.Review the downstream specifications and verification plans in ASIC, software and/or platform to ensure requirements are fulfilled.You will evaluate 3rd party IPs to ensure that they comply with the protocol, performance, silicon area, power, and security requirementsParticipate in the workgroups of different industry groups, including PCI-SIG, CXL, OCP, JEDEC, DMTF and other HPC and AI workgroups.Apply for patents for the novel technologies in our architecture.Post-Silicon production support with silicon debug and publishing of customer documentation.Support the publication of customer documentation such as datasheets and programming guides.What You Need for this PositionMust have a Master's (Ph.D. preferred) in Computer Science, Electrical Engineering, Computer Engineering, or similar with 10+ years of experience:Proven track record of successful deployment of architectures/architecture features in SoC products.Proficiency in evaluating architecture proposals, 3rd party IP features and software/system algorithms and providing innovative guidance.Good ability in architecture analysis and system modelingDeep knowledge of the PCIe and CXL standards.Deep experience in defining security architecture for SoCsDeep experience in ARM CPU subsystem architecture, including memory subsystem design, cache subsystems and software debug architecture.Experience with the Linux OS including drivers, as well as BIOS is a plusGood knowledge in SoC security architecture including secure boot, attestation, data integrity, access control and security life cycle management is desirable.Familiarity with security and platform management standards such as SPDM, PLDM and Caliptra is a plus.Working knowledge of cryptographic algorithms and their implementation, including encryption, secure hash, digital signature, random bit generation is a plus.So, if you are an ASIC Architect with experience, please apply today! or send an updated copy of your resume to Mike.Vandenbergh@CyberCoders.com for immediate consideration!BenefitsMedical/Dental/VisionPTO/Vacation DaysEquityFor this position you must be currently authorized to work in the United States. We do not sponsor for this position.Preferred SkillsASICSoC ArchitectMicroarchitectureCPUData CenterSecurity ArchitectureARMSilicon ArchitectSoC SecurityInterconnect