Timing Constraint Engineer

Meet the TeamThe Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. CHG silicon chips, optical modules, and full hardware systems solve for a range of demanding use cases from access points for a medium size business, to an enterprise data center, and the largest of hyperscale AI workloads. We are team passionate about technology, have aspirational goals, and love to win as a team.Your ImpactYou are a detail-oriented Timing Constraint (SDC) Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with ASIC Front and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, you’ll contribute to developing next-generation networking chips. Responsibilities include: Developing timing constraints at block, sub-chip, and full-chip levels in multiple timing modes. Performing quality checks such as duplicated constraints, promotion/demotion between block and top level SDCs and checking timing for unconstrained endpoints, no clock, etc. Resolving design and flow issues and driving execution to ensure progress and accuracy.At times participating in SDC validation, CDC delay check, and SDC flow development. Developing methodologies, guidelines, and checklists to streamline STA work, along with advising the Physical Design team on best practices.Minimum QualificationsBachelor’s degree in electrical or computer engineering (or other equivalent field) with 8+ years of related work experience.Experience with block/full chip SDC development in functional and test modes.Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus.Proficient in one or more of the following languages Perl, TCL, Python, Makefile, or other related scripting languages.Preferred QualificationsMaster’s Degree in electrical or computer engineering (or other equivalent field).Thorough understanding of Liberty file formats including standard cells/memory/IO/IP modeling and its usage in the ASIC flow.Prior experience with SDC debugging tools: Synopsys GCA/TCM, Cadence CCD.Strong communications skill and team player.Why Cisco?#WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters – with people like you!Nearly every internet connection around the world touches Cisco. We’re the Internet’s optimists. Our technology makes sure the data travelling at light speed across connections does so securely, yet it’s not what we make but what we make happen which marks us out. We’re helping those who work in the health service to connect with patients and each other; schools, colleges and universities to teach in even the most challenging of times. We’re helping businesses of all shapes and size to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world – whether through 5G, or otherwise.We tackle whatever challenges come our way. We have each other’s backs, we recognize our accomplishments, and we grow together. We celebrate and support one another – from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we’re committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.So, you have colorful hair? Don’t care. Tattoos? Show off your ink. Like polka dots? That’s cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCiscoLocation:San Jose, California, USArea of InterestEngineer - HardwareCompensation Range149600 USD - 214100 USD Job TypeProfessionalTechnology InterestWireless, MobilityJob Id1431099Message to applicants applying to work in the U.S. and/or Canada:When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings. Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday, plus a day off for their birthday. Employees accrue up to 20 days of Paid Time Off (PTO) each year and have access to paid time away to deal with critical or emergency issues without tapping into their PTO. We offer additional paid time to volunteer and give back to the community. Employees are also able to purchase company stock through our Employee Stock Purchase Program.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.