Lead RFIC ASIC Design Engineer

The Rohde & Schwarz technology group is among the trailblazers when it comes to paving the way for a safer and connected world with its leading solutions in test & measurement, technology systems, networks and cybersecurity. We are looking for a highly motivated Lead RFIC ASIC Design Engineer for our North American R&D Center in Hillsboro, Oregon. Our team is designing the next generation data converters for our world class test equipment. This is a small team environment in a great location, that has a history of very successful devices that have been designed into our industry leading test and measurement equipment. You’ll find our System on Chip (SoC) solutions embedded in R&S instruments in labs all over the world. Our R&D office is located in Hillsboro, west of Portland, Oregon. We have a light, quiet and modern work environment in a new building. This is a hybrid work position. We believe in the close personal interactions that are needed for a successful team, but understand that people occasionally need to work from home. Fully remote work is not an option for this role. Your tasks Manage large analog block / full-chip schematics to ensure correct connectivity and functionality.Assist layout floor-planning efforts at a high-level.Design and implement high speed analog/mixed-signal circuits in advanced CMOS/BiCMOS technology for integration in high performance mixed-signal SoCs.Clearly communicate with team members the various requirements or design conflicts.Design, simulate, analyze, model, document and communicate integrated circuit IP.Understand system level design requirements as applied to integrated circuit design.Characterization and debugging of analog IC designs for testing and measurement equipment. Your qualifications MS degree in electrical engineering, with 5-10+ years of experience in IC Design.Permanent resident of the US.Proven ability to technically lead a design team to create both full chips and large analog macros.Thinks at the higher chip level to do block aggregation.Understands trade-offs between various block partitioning schemes.Experience doing top-level floor-planning with a layout engineer.Thorough understanding of detailed analog circuit design and the ability to design independently various functional blocks.In-depth understanding of BiCMOS and CMOS process technologiesUnderstanding of simulation models, design rules and verification procedures (DRC/LVS/ERC)Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESDExperience designing analog integrated circuits for a complex mixed signal SoCs from creation into production.To be considered, candidates must have US citizenship or permanent work authorization. Interested? We are looking forward to receiving your application! The total compensation for this position is $160-225k . Total compensation includes base salary, variable pay (when applicable) plus benefits. The range is determined by the position, geographic location and level. Individual pay within the range is determined by several factors including location, education or training, relevant work history, sales incentive structure and job-related skills.We are committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed sexual orientation, gender identity, marital status, national origin, age, veteran status, disability or any other protected class. City/regionHillsboro (Oregon) (USA)Entry levelProfessionalsEmployment TypeFull-time, unlimitedRef. Number9465