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BAE Systems

Senior FPGA Design Engineer

BAE Systems, Totowa, New Jersey


BAE Systems Senior FPGA Design Engineer Totowa, New Jersey Apply Now BAE Systems has an open position for a Senior FPGA Digital Design Engineer Our employees work on the world’s most advanced electronics from detecting threats for F-35 pilots to illuminating the night for soldiers. We are developing the technology of tomorrow, delivered today. Our flexible work environment provides you a chance to change the world without giving up your personal life. We put our customers first exemplified by our mission: We Protect Those Who Protect Us. Sound like a team you want to be a part of? Come build your career with BAE Systems. The Electronic Combat Solutions Hardware Engineering Group is looking for a Senior FPGA Digital Design Engineer to support FPGA designs through all phases of development. The ideal candidate is expected to perform activities including assisting in design architecture, ownership of RTL coding, synthesis, basic test bench development, lab testing, product support, and FPGA security. There are multiple growth paths for the individual, technically or otherwise - Technical Lead on future or current programs, Control Account Manager, or Functional Manager. Please note that pursuant to a government contract, this specific position requires US citizenship status along with the ability to obtain a minimum of Secret Clearance. Because of the need for consistent, in-person collaboration and/or the requirement to perform all work onsite due to the nature of this particular role, it will be performed full-time on site. Required Education, Experience, & Skills Current Security Clearance (Secret), or eligible to obtain one 4 years of relevant experience with bachelor’s degree (less with an advanced degree) Experience in FPGA or ASIC Design/Development, including VHDL (preferred) or Verilog HDL coding Experience with digital design tools and simulators Experience with designer-level test bench (VHDL, Verilog, or SystemVerilog) Familiarity with revision control (git, cvs, clearcase, subversion, etc.) Familiarity with static timing analysis Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) Strong written and oral communication skills Self-starter and a good team player Ability to mentor and willingness to be mentored Strong debug and problem-solving skills Preferred Education, Experience, & Skills Experience with DSP fundamentals and FPGA implementation Experience with Matlab/Simulink Experience dealing with legacy designs Experience in hardware design and hands-on lab debug Experience with Xilinx ISE/Vivado or Altera Quartus Experience using digital simulations with Modelsim/QuestaSim Experience with generating scripts (Perl, Tcl, Python) Working knowledge of UVM/SystemVerilog Working knowledge of Radar systems Working knowledge of C/C++ Working knowledge of high-speed ADC/DAC interfaces, SERDES, PCIe Pay Information Full-Time Salary Range: $97,800 - $166,320. Please note: This range is based on our market pay structures. However, individual salaries are determined by various factors including, but not limited to: business considerations, local market conditions, and internal equity, as well as candidate qualifications. Employee Benefits At BAE Systems, we support our employees in all aspects of their life, including their health and financial well-being. Regular employees scheduled to work 20 hours per week are offered: health, dental, and vision insurance; health savings accounts; a 401(k) savings plan; disability coverage; and life and accident insurance. We also have an employee assistance program, a legal plan, and other perks including discounts on home, auto, and pet insurance. Our leave programs include paid time off, paid holidays, as well as other types of leave, including paid parental, military, bereavement, and applicable federal and state sick leave. 105136BR EEO Career Site Equal Opportunity Employer. Minorities, females, veterans, individuals with disabilities, sexual orientation, gender identity, gender expression. J-18808-Ljbffr