Synopsys
ASIC Digital Design, Sr Staff Engineer
Synopsys, Sunnyvale, California, United States, 94087
Design Verification Engineer (Senior Staff)
51259BR
USA - California - Mountain View/Sunnyvale
Job Description and Requirements
In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.
Qualifications:BSEE
with 8+ years of relevant experience or MSEE with 6+ years of relevant experienceExperience in ASIC Verification at the SOC level and block levelExceptional Verilog, System Verilog and Perl/Python scripting skillsProficiency in UVM verification environmentSolid Debugging skillsDemonstrates good communication and problem-solving skillsUnderstanding of high-speed interface protocols is a plusOur Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
The base salary range across the U.S. for this role is between $150,000-$226,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Job Category
Engineering
Country
United States
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Base Salary Range
$150,000 - $226,000
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51259BR
USA - California - Mountain View/Sunnyvale
Job Description and Requirements
In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.
Qualifications:BSEE
with 8+ years of relevant experience or MSEE with 6+ years of relevant experienceExperience in ASIC Verification at the SOC level and block levelExceptional Verilog, System Verilog and Perl/Python scripting skillsProficiency in UVM verification environmentSolid Debugging skillsDemonstrates good communication and problem-solving skillsUnderstanding of high-speed interface protocols is a plusOur Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
The base salary range across the U.S. for this role is between $150,000-$226,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Job Category
Engineering
Country
United States
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Base Salary Range
$150,000 - $226,000
#J-18808-Ljbffr