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Cisco Systems, Inc.

Senior Signal Integrity Engineer

Cisco Systems, Inc., San Jose, California, United States, 95199


What You'll Do:As a Senior Signal Integrity Engineer at Cisco, you will be at the cutting edge of high-speed PCB design. You will define and optimize high-speed SerDes interfaces (>50Gbps), DDR interfaces, and system interconnects. Your role will involve providing technical analysis, modeling, and simulation to ensure our designs meet stringent signal integrity and power integrity requirements. You will create detailed design guidelines, address SI/PI-related issues, and validate designs through lab measurements and performance testing. Additionally, you will coordinate various performance and compliance tests, including SI/PI Validation Testing, EMI Testing, Electrical Design Validation Testing, and Optical Design Validation Testing.Who You'll Work With:Join the dynamic and innovative Service Provider Routing group, where you'll be part of the team developing the Cisco 8000 line of routers. These routers are designed with application awareness to make network infrastructure flexible and agile for dynamic responses. Our team is passionate, collaborative, and always pushing the boundaries of technology to deliver groundbreaking solutions.Who You Are:You are a seasoned engineer with a passion for high-speed PCB design and signal integrity. Your hands-on experience in chip and system-level signal integrity and power integrity analyses makes you a technical leader. You have a deep understanding of high-speed serial interface channel design, transmission line theory, and microwave engineering concepts. Your knowledge of PCB board stack-up and proficiency with simulation and modeling tools like Hspice, ADS, HFSS, and PowerSI are exceptional. You are skilled with lab equipment such as oscilloscopes, VNAs, and spectrum analyzers. Your strong communication skills, both written and verbal, and your ability to work independently and in teams make you an invaluable collaborator.MINIMUM REQUIREMENTS:MSEE with over 5+ years of experience in signal integrity.Hands-on experience in chip and system-level signal integrity and power integrity analyses.Familiarity with high-speed serial interface channel design and signal integrity considerations.Understanding of transmission line theory and microwave engineering concepts such as Maxwell equations and S-parameters.Knowledge of PCB board stack-up/construction.Proficiency with simulation and modeling tools like Hspice, ADS, HFSS, and PowerSI.Familiarity with lab equipment like oscilloscopes, VNAs, and spectrum analyzers.PREFERRED REQUIREMENTS:Experience in co-leading signal integrity work for high-speed boards.Experience in designing system high-speed SerDes interfaces.Experience performing I/O simulation for PCB interfaces and providing PCB routing rules for CAD teams.Experience with high-speed SerDes test chip evaluation and interoperability testing.Experience analyzing power delivery networks for critical high-speed interfaces on system boards.Experience with SerDes tuning and link optimization on prototypes and system bring-up.Ability to be a self-starter, work independently, and collaborate effectively in teams.

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